caiyu/nextpnr
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
931 Commits 22 Branches 7 Tags 17 MiB
10305db43f
Commit Graph

322 Commits

Author SHA1 Message Date
David Shah
7a8e8999d2 clangformat 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-25 19:45:38 +02:00
Clifford Wolf
ddfb1f1ff3 Fix BaseCtx::unlock() 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-25 13:35:53 +02:00
Clifford Wolf
f3dab003e7 Merge branch 'bba' into 'master' 
bbasm

See merge request SymbioticEDA/nextpnr!18
 2018-07-25 11:07:51 +00:00
Sergiusz Bazanski
14a501969a Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/pll-pads 2018-07-25 11:32:45 +01:00
Sergiusz Bazanski
aad0d3eb35 ice40: support PLL40_*_PAD, fix pass-through LUT for LOCK 2018-07-25 11:32:21 +01:00
Miodrag Milanovic
e3ce2f544d noreturn have to be void, so there is no UB 2018-07-25 11:58:23 +02:00
Miodrag Milanovic
5e58a329e6 Make thread check portable 2018-07-25 09:32:13 +02:00
Clifford Wolf
a08b71c676 Merge branch 'placeconstr2' 2018-07-24 19:21:36 +02:00
David Shah
e200c281d9 common: Remove use of deprecated APIs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 15:45:49 +02:00
Clifford Wolf
f86fc6e7fd Typo fix 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-24 12:41:08 +02:00
Clifford Wolf
1538d26073 Add CellInfo data for placement constraints 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-24 12:39:33 +02:00
Clifford Wolf
9d38907e95 Add G_ARROW (for now same look as G_LINE) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-24 12:18:01 +02:00
David Shah
7858663aa7 timing: Model clock to Q times 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 11:46:14 +02:00
Clifford Wolf
e647604e2a Add Context::archcheck() and "nextpnr-ice40 --test" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-23 14:03:23 +02:00
Clifford Wolf
38962d0f02 clangformat 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-23 12:45:31 +02:00
Clifford Wolf
a436facfd0 Add fallback to estimateDelay() in getNetinfoRouteDelay() 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-23 12:44:26 +02:00
Clifford Wolf
62b66e0208 Rename getWireBelPin to getBelPinWire 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-22 10:59:21 +02:00
Clifford Wolf
c6e4ad3227 Move common patterns from router1 to Context API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-22 02:16:03 +02:00
Clifford Wolf
1e96999863 clangformat 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-22 00:50:49 +02:00
Clifford Wolf
9e6deed3b8 Merge branch 'q3k/lock-2-electric-boogaloo' into 'master' 
Basic locking and threading for Arch/GUI

See merge request SymbioticEDA/nextpnr!10
 2018-07-21 19:45:24 +00:00
Clifford Wolf
30e2f0e1e8 Add Loc constructors 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-21 21:40:06 +02:00
Sergiusz Bazanski
6588aafdb8 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/lock-2-electric-boogaloo 2018-07-21 20:00:42 +01:00
Clifford Wolf
39b843ecac Merge branch 'router1ng' into 'master' 
Router1ng

See merge request SymbioticEDA/nextpnr!13
 2018-07-21 17:59:44 +00:00
Clifford Wolf
c796b301d3 Bugfix in router1: Also bind src_wire 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-21 19:36:48 +02:00
Clifford Wolf
2f996e6a30 Add final sanity check in router1 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-21 17:54:47 +02:00
Clifford Wolf
41194d934b Refactoring of router1 
- Use source-sink pairs as jobs, not whole nets
- Route nets with smallest slack first
- Preserve routes for already routed source-sink pairs
- Add small incentive for re-using wires

Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-21 17:02:53 +02:00
David Shah
80097526ee Fix placement bug with VexRiscV reported by John McMaster 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-21 16:45:46 +02:00
Clifford Wolf
78f40ca0af Change DelayInfo semantics to what we actually need 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-21 13:52:59 +02:00
Clifford Wolf
c556242976 Add getWireDelay API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-21 13:38:44 +02:00
Sergiusz Bazanski
0311a27a53 Use UI lock for yielding 2018-07-20 18:34:59 +01:00
Sergiusz Bazanski
76e5236fb3 Nuke IdStringDB 2018-07-20 18:24:16 +01:00
Sergiusz Bazanski
b5b956bd21 Remove dead code. 2018-07-20 17:57:16 +01:00
Clifford Wolf
fd8239e170 Add Location APIs to generic arch 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-20 18:09:22 +02:00
Clifford Wolf
f6fa0300ae Improve iCE40 and common Loc code 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-20 17:33:57 +02:00
Clifford Wolf
e16b4a325e Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into gridapi 2018-07-20 17:13:26 +02:00
Sergiusz Bazanski
19f4b68f07 clang-format and uncomment debug 2018-07-20 13:19:56 +01:00
Sergiusz Bazanski
b4b111a053 Move pthread yield hack into BaseCtx 2018-07-20 13:15:22 +01:00
Sergiusz Bazanski
b84a446eef Mix-in Deterministic RNG at Context instead of BaseCtx 2018-07-20 11:04:54 +01:00
Sergiusz Bazanski
55d5f8f248 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/lock-2-electric-boogaloo 2018-07-20 10:59:33 +01:00
David Shah
6c38df7295 ice40: Adding cell definition for DSPs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-19 13:22:46 +02:00
David Shah
d221e90706 Reducing performance cost of asserts 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-19 11:43:10 +02:00
Clifford Wolf
609794f9e6 Add Net/Cell "udata" field 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-18 13:29:58 +02:00
Serge Bazanski
03508faabf WIP. 2018-07-17 19:16:26 +01:00
Clifford Wolf
ddfc535df7 Add ArchNetInfo and ArchCellInfo 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-17 20:04:49 +02:00
Serge Bazanski
2f5b94fe30 Add basic external locking, lock from P&R 2018-07-17 16:27:50 +01:00
Serge Bazanski
498bef3f3e Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/lock-2-electric-boogaloo 2018-07-17 16:03:48 +01:00
Clifford Wolf
c0f1af87f6 Add Loc struct for x/y/z bel locations 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-17 17:03:44 +02:00
David Shah
924037129c Fix driver finder when net is undriven 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-17 11:00:18 +02:00
David Shah
56fa8cc669 refactor: Remove incorrect uses of the term 'wirelength' 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-16 17:13:40 +02:00
Serge Bazanski
91db413c60 Refactor RNG out to separate DeterministicRNG class 
This well also allow for better lifecycle control over the state of the
RNG in the future.
 2018-07-14 20:33:32 +01:00