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Author SHA1 Message Date
William D. Jones
bbc683dd75 machxo2: Implement all of Bel API except getBelPinWire. 2021-02-12 10:36:59 +00:00
William D. Jones
138519d820 machxo2: Fix place phase segfault. Placement suceeds with warning of no clock. 2021-02-12 10:36:59 +00:00
William D. Jones
8a94a3451f machxo2: Stub valid BEL functions with comment. Place phase segfaults. 2021-02-12 10:36:59 +00:00
William D. Jones
5f748272fc machxo2: Implement bel_to_cell and API functions using it. 2021-02-12 10:36:59 +00:00
William D. Jones
682de724a8 machxo2: Implement 2 Bel API functions. 2021-02-12 10:36:59 +00:00
William D. Jones
3e6be4bbfd machxo2: Implement General Methods. 2021-02-12 10:36:59 +00:00
William D. Jones
094233a4ab machxo2: Implement getBelLocation to stop std::out_of_range in place phase. 2021-02-12 10:36:59 +00:00
William D. Jones
52b424c385 machxo2: Convert uint_t to int_t in packed structs. 2021-02-12 10:36:59 +00:00
William D. Jones
dc07054ee8 machxo2: Implement functions to get device utilization (throws std::out_of_range during place phase). 2021-02-12 10:36:59 +00:00
William D. Jones
ec4a9685ab machxo2: Initialize Arch context with device type and package. 2021-02-12 10:36:59 +00:00
William D. Jones
6f6aaa4a97 machxo2: Add binary blob struct definitions. 2021-02-12 10:36:59 +00:00
William D. Jones
a3a3a91b72 machxo2: Clean up packing pass a bit. 2021-02-12 10:36:59 +00:00
William D. Jones
c5292e0db5 machxo2: Finalize (hopefully) facade_import for prototype. 2021-02-12 10:36:59 +00:00
William D. Jones
3d287adbcf machxo2: Add package/IO info to facade_import. 2021-02-12 10:36:59 +00:00
William D. Jones
b739513894 machxo2: Import constids and BELs into facade_import. 2021-02-12 10:36:59 +00:00
William D. Jones
dfedef5772 machxo2: Add pip and wire info into facade_import. 2021-02-12 10:36:59 +00:00
William D. Jones
e0b14ba98e machxo2: Begin populating binary blob via facade_import. 2021-02-12 10:36:59 +00:00
William D. Jones
6ce2edc2f1 machxo2: Add SMT mode to mitertest.sh 2021-02-12 10:36:59 +00:00
William D. Jones
4f042eac53 machxo2: Rework examples to test pack, place, and route phases. 2021-02-12 10:36:59 +00:00
William D. Jones
5838662b2f machxo2: Make sure REGSET FF parameter is set in FACADE_SLICE. Init blinky ctr to 0 for miter circuit. 2021-02-12 10:36:59 +00:00
William D. Jones
da6204442f machxo2: Add LUT and FF packing functions. 2021-02-12 10:36:59 +00:00
William D. Jones
f2a240550e machxo2: Always remove nextpnr_iobufs for now- assume manually instantiated primitives. 2021-02-12 10:36:59 +00:00
William D. Jones
42214b226f machxo2: Add constant packing implementation, fix bugs in create_machxo2_cell. 2021-02-12 10:36:59 +00:00
William D. Jones
3424badeff machxo2: Create basic cells for packing. 2021-02-12 10:36:59 +00:00
William D. Jones
5c30f95c42 machxo2: Add initial set of constids for packing. 2021-02-12 10:36:59 +00:00
William D. Jones
1cde40792f machxo2: Improve examples directory. 2021-02-12 10:36:59 +00:00
William D. Jones
ade94efbff machxo2: synth directory (simulation, techmaps, synth script) is now provided by yosys. 2021-02-12 10:36:59 +00:00
William D. Jones
59efba2fc0 machxo2: Stub out cells functions. 2021-02-12 10:36:59 +00:00
William D. Jones
88b7dfce58 machxo2: Stub out arch API functions and members. 2021-02-12 10:36:59 +00:00
William D. Jones
e5576448ea machxo2: Remove HeAP placer for now, fix typos. 2021-02-12 10:36:59 +00:00
William D. Jones
512daf2c89 machxo2: Remove generic packing. 2021-02-12 10:36:59 +00:00
William D. Jones
9704f422dc machxo2: Start creating MachXO2CommandHandler. 2021-02-12 10:36:59 +00:00
William D. Jones
98214865be machxo2: Remove generic API functions from Arch. 2021-02-12 10:36:59 +00:00
William D. Jones
78880e1fdf machxo2: Remove pybindings unneeded files from examples and update README.md and scripts accordingly. Delete resources directory. 2021-02-12 10:36:59 +00:00
William D. Jones
539651609c Update machxo2 backend with minimal build system changes so nextpnr compiles again. 2021-02-12 10:36:59 +00:00
William D. Jones
c38762f91f Update machxo2 backend with build system changes. 2021-02-12 10:36:59 +00:00
William D. Jones
81d6bc3614 Create sub import of facade DB for 1200 device. 
Signed-off-by: William D. Jones <thor0505@comcast.net>
 2021-02-12 10:36:59 +00:00
gatecat
510969ab97 Create machxo2 backend (renamed from generic). 
Signed-off-by: William D. Jones <thor0505@comcast.net>
 2021-02-12 10:36:59 +00:00
gatecat
c956cae824 Make BaseArch getDecalGraphics return an empty range 
Fix assertion failure when opening the GUI on an arch without any
decals.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-12 10:35:51 +00:00
gatecat
ad7bb51030
Merge pull request #580 from litghost/add_design_loaded_state_variable 
Add design_loaded state variable.
 2021-02-12 09:54:15 +00:00
gatecat
5dfbe703ae
Merge pull request #581 from litghost/add_isbelhidden 
Add getBelHidden and add some missing "override" statements.
 2021-02-12 09:53:50 +00:00
Keith Rothman
99e397000c Add getBelHidden and add some missing "override" statements. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-11 14:58:02 -08:00
Keith Rothman
96293ab25e Add design_loaded state variable. 
This is to decouple the command line flag "--json" and enable other
frontend's.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-11 13:43:23 -08:00
Keith Rothman
73710416b4 Add control to whether GenericFrontend splits IO ports. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-11 13:33:55 -08:00
gatecat
7c7d69e1d2 router2: Support for multiple bel pins per cell pin 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-10 15:14:44 +00:00
gatecat
7dafc64f78 router1: Support for multiple bel pins per cell pin 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-10 14:46:03 +00:00
gatecat
535723f414 Start making use of getBelPinsForCellPin API 
This replaces getNetinfoSinkWire with 3 new functions for different use
cases.

At the moment all existing code has been moved to getNetinfoSinkWire
with phys_idx=0 so the build doesn't break; but this won't yet function
properly with more than one sink. But it provides a base on which to
work on refactoring the routers to support this case.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-10 14:18:12 +00:00
gatecat
85bb108ba4 Add getBelPinsForCellPin to Arch API 
This is a basic implementation, without considering "M of N"
arrangements (e.g. for LUT permuation where you only want to route to 1
out of 4/6 sinks) or using a type other than IdString to identify bel
pins.

But this is also enough to start working out where in nextpnr will break
due to removing the 1:1 cell:bel pin cardinality, as a next step.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-10 11:54:54 +00:00
gatecat
e376f950fe
Merge pull request #574 from YosysHQ/gatecat/belpin-1 
Remove the unused CellInfo::pins field
 2021-02-10 11:27:11 +00:00
gatecat
6bd3dba1e3 Remove the unused CellInfo::pins field 
No arches ever actually used this to implement a Cell->Bel pin mapping,
and in practice if any did try they would inevitably hit bitrot.

This field had limited use in practice as it is necessary to also
support cases where one cell pin maps to more than one bel pin. Removing
this old field is the first step towards developing a new API for this.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-10 10:42:26 +00:00