Tested and verified working: the trivial configuration:
module USRMCLK( USRMCLKI, USRMCLKTS );
input USRMCLKI, USRMCLKTS;
endmodule
module top( input clk );
reg[ 24:0 ] count = 0;
always @( posedge clk ) begin
count <= count + 1'b1;
end
USRMCLK mspi( .USRMCLKI( count[ 20 ] ), .USRMCLKTS( count[ 24 ] ) );
endmodule
produces the expected output (toggling at high frequency, toggling
tri-state at lower frequency) on an LFE5U-85 when fed with an appropriate
clock. See https://bayimg.com/AAnNKAAGO for an example. The top
(magenta) trace is the MCLK line.
