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1d3e5151ba
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1209 Commits

Author SHA1 Message Date
gatecat
1d3e5151ba clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-05-19 09:00:31 +02:00
gatecat
ea925f39fb archapi: Add getArcDelayOverride 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-05-17 09:54:14 +01:00
Nathaniel Quillin
ca2e328a5f rename c++20 keyword s/requires/requires_range. 
See https://en.cppreference.com/w/cpp/language/requires for more details.
 2023-05-16 12:43:40 +02:00
gatecat
e4fcd3740d cmake: Make HeAP placer always-enabled 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-03-17 10:38:11 +01:00
gatecat
132a98a91d router1: Add error when dest port has no wire 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-03-06 14:15:48 +01:00
Catherine
ebbaf8c08d common: disable parallel refinement only without threads. 
Previously it was always disabled on WebAssembly builds.
 2023-02-23 09:45:19 +01:00
Catherine
8f0731edc9 common: update deprecated use of boost::filesystem::basename. 2023-02-23 09:44:46 +01:00
Catherine
4b4f4a7da1 common: add missing includes for libc++. 2023-02-23 02:32:19 +00:00
Thomas W Rodgers
825d646196 Include <cstdint> in common/kernel/hashlib.h 
The definitions for uint32_t, uint64_t report as undefined when
compiling under GCC13. They were previously found by transitive
includes, but this is not guaranteed to work, and GCC13 forced
the issue.
 2023-02-18 10:26:01 -08:00
rowanG077
32e818204e common: Print out generated seed value 2023-02-16 12:02:00 +01:00
rowanG077
3608c3eb02 common: Implement Werror flag 2023-02-13 10:52:05 +01:00
gatecat
9b5e5f124c clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-01-25 10:29:32 +01:00
gatecat
7845b66512 Add missing <set> includes 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-01-20 09:04:41 +01:00
gatecat
6079326633 context: Add getNetinfoRouteDelayQuad 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-01-18 16:28:33 +01:00
gatecat
f89b959b5f clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-01-02 09:33:11 +01:00
Miodrag Milanovic
64f7306b24 initialize netShareWeight 2022-12-22 20:16:13 +01:00
Miodrag Milanovic
4af8964069 propagate netShareWeight 2022-12-22 16:11:10 +01:00
Miodrag Milanovic
bd628ce591 Remove deprecated functions 2022-12-22 15:26:39 +01:00
myrtle
a80d63b268
Merge pull request #1066 from arjenroodselaar/place_timeout 
Timeout when legal placement can't be found for cell
 2022-12-21 07:10:09 +00:00
Arjen Roodselaar
be1f700b0b Set divisor instead of absolute value 2022-12-20 13:10:37 -08:00
Arjen Roodselaar
923458a2c9 Allow setting cell placement timeout 2022-12-20 11:15:06 -08:00
Arjen Roodselaar
d5299f144f Add --no-placer-timeout flag to override timeout during refinement 2022-12-19 22:58:52 -08:00
Arjen Roodselaar
2712cbf6e4 Increase timeout 2022-12-19 14:00:19 -08:00
Arjen Roodselaar
6e0311efca Timeout when legal placement can't be found for cell 2022-12-17 16:07:57 -08:00
gatecat
ccb573298c heap: encourage more spreading of heterogenous chains 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-12-17 10:50:20 +00:00
gatecat
603b60da8d api: add explain_invalid option to isBelLocationValid 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-12-07 10:27:58 +01:00
gatecat
d1afd6c0f1 heap: Remove custom bounding-box type 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-12-07 10:02:16 +01:00
gatecat
e260ac33ab refactor: ArcBounds -> BoundingBox 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-12-07 10:00:53 +01:00
gatecat
c62a947a28 api: Make NetInfo* of checkPipAvailForNet const 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-12-02 14:20:39 +01:00
gatecat
8a69bd0735 Fix "implicit copy constructor for 'Property' is deprecated" 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-11-10 10:57:41 +01:00
gatecat
445d32497d run clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-10-17 12:35:02 +02:00
airskywater
9572f6f032
Modify code to meet the code style preferences 2022-09-24 14:46:35 +08:00
airskywater
c702e15a3f
Add more sanity check for pointers 2022-09-24 12:03:44 +08:00
airskywater
78f67ae5bc
fix runtime segmentation fault 
disable null pointer dereference!
 2022-09-24 11:35:40 +08:00
myrtle
f4e6bbd383
Merge pull request #1019 from antmicro/support-clock-relations 
Support cross-domain clock relations in timing analyser
 2022-09-20 15:55:43 +02:00
Maciej Kurc
9000c41c4b Added the --ignore-rel-clk option to control timing checks for cross-domain paths, formatted code 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2022-09-20 14:40:40 +02:00
gatecat
415c097df8 router2: Reserve source wire, too 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-09-20 13:42:51 +02:00
Maciej Kurc
1f1bae3e23 Code cleanup 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2022-08-31 16:19:15 +02:00
Maciej Kurc
60a6e8b070 Added timing check for cross-domain paths for related clocks 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2022-08-31 14:15:33 +02:00
Maciej Kurc
9a61ad9234 Augmented TimingAnalyser class with detection of clock to clock relations 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2022-08-30 17:30:58 +02:00
Miodrag Milanovic
a00b997cf1 add missing overrides 2022-08-22 12:35:24 +02:00
Miodrag Milanovic
1aa797b820 Fix parameter order 2022-08-22 12:32:50 +02:00
gatecat
05167fcb8b pybindings: Mark CellInfo::bel as readonly 
bel bindings should be updated with bindBel/unbindBel during placement, or setting the BEL attribute for constraints before placement.

Fixes #522

Signed-off-by: gatecat <gatecat@ds0.me>
 2022-08-18 15:09:41 +02:00
gatecat
77c82b0fbf refactor: id(stringf(...)) to new idf(...) helper 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-08-10 10:57:46 +01:00
gatecat
09e388f453 netlist: Add PseudoCell API 
When implementing concepts such as partition pins or deliberately split
nets, there's a need for something that looks like a cell (starts/ends
routing with pins on nets, has timing data) but isn't mapped to a fixed
bel in the architecture, but instead can have pin mappings defined at
runtime.

The PseudoCell allows this by providing an alternate, virtual-function
based API for such cells. When a cell has `pseudo_cell` used, instead of
calling functions such as getBelPinWire, getBelLocation or getCellDelay
in the Arch API; such data is provided by the cell itself, fully
flexible at runtime regardless of arch, via methods on the PseudoCell
implementation.
 2022-07-08 14:30:57 +02:00
gatecat
e1ba379fb7 generic: Use arch_pybindings_shared 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-07-04 18:39:00 +02:00
gatecat
447b5b905c Don't assert on mixed domain paths in report 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-05-22 13:56:36 +01:00
YRabbit
1aa693732c common: Correct a minor typo in the message 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2022-05-10 21:19:02 +10:00
gatecat
19cade3b3b prefine: Do full-tile swaps, too 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-04-19 18:37:16 +01:00
gatecat
61b3e2e1ff Move general parallel detail place code out of parallel_refine 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-04-17 20:10:49 +01:00