Commit Graph

214 Commits

Author SHA1 Message Date
Maciej Kurc
1f1bae3e23 Code cleanup
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2022-08-31 16:19:15 +02:00
Maciej Kurc
8b6be09809 Fixed port timing classes of DCC ports in the Nexus architecture
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2022-08-30 17:30:13 +02:00
gatecat
c60fb94b6c refactor: Use IdString::in instead of || chains
Signed-off-by: gatecat <gatecat@ds0.me>
2022-08-10 18:58:22 +01:00
gatecat
f7354d092d nexus: Add timing data for LRAM
Signed-off-by: gatecat <gatecat@ds0.me>
2022-08-10 15:47:22 +01:00
gatecat
77c82b0fbf refactor: id(stringf(...)) to new idf(...) helper
Signed-off-by: gatecat <gatecat@ds0.me>
2022-08-10 10:57:46 +01:00
gatecat
ad502bf64b nexus: Fix CSDECODE parsing
Signed-off-by: gatecat <gatecat@ds0.me>
2022-07-19 09:58:00 +01:00
Maciej Dudek
8c4e3e91cc Change write_dcc to work with tilegroups from prjoxide
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2022-05-27 10:58:39 +02:00
gatecat
2ed68a21db clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
2022-03-31 10:49:00 +01:00
Maciej Dudek
b9e76d1bcd Rename parse_lattice_param to parse_lattice_param_from_cell
Add new definition for parse_lattice_param

Now parse_lattice_param is design to parse Property rather than search for it in cell.
This functionalty was move to parse_lattice_param_from_cell.

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2022-03-30 14:59:47 +02:00
Maciej Dudek
49cc4ca30b Nexus: Fixed OSCA parameters, add pll default parameters
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2022-03-18 17:26:06 +01:00
gatecat
14d53dfec8 clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
2022-03-17 19:24:05 +00:00
Maciej Kurc
237391c1b8 nexus: Corrected auto frequency constraint for LF output of OSCA
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2022-03-16 09:20:15 +01:00
Maciej Kurc
43861c0ee2 nexus: Added support for the DCS Bel
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2022-03-16 09:20:15 +01:00
Maciej Kurc
1cc71c7846 nexus: Added FASM feature emission for DCC and port timing class info
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2022-03-15 10:43:31 +01:00
gatecat
df7e26c1aa clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
2022-03-09 17:12:59 +00:00
Maciej Dudek
191be632e2 nexus: DCCs cannot be cascaded
This commit solves implicit cascading when clock signal drives DCC and logic

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2022-03-09 14:13:29 +01:00
gatecat
86699b42f6 Switch to potentially-sparse net users array
This uses a new data structure for net.users that allows gaps, so
removing a port from a net is no longer an O(n) operation on the number
of users the net has.

Signed-off-by: gatecat <gatecat@ds0.me>
2022-02-27 13:47:05 +00:00
gatecat
6a32aca4ac refactor: New member functions to replace design_utils
Signed-off-by: gatecat <gatecat@ds0.me>
2022-02-18 11:13:18 +00:00
gatecat
76683a1e3c refactor: Use constids instead of id("..")
Signed-off-by: gatecat <gatecat@ds0.me>
2022-02-16 17:09:54 +00:00
Dan Callaghan
5c30093360 nexus: reduce OSCA worst case to 7%
The current version of Crosslink-NX Family Data Sheet lists the high
frequency oscillator maximum frequency as 481.5MHz (that is, 7% higher
than its nominal 450MHz):

https://www.latticesemi.com/-/media/LatticeSemi/Documents/DataSheets/CrossLink/FPGA-DS-02049-1-2-1-CrossLink-NX-Family.ashx?document_id=52780

Older documents listed a wider frequency range but ±7% is the range for
production parts.
2022-02-10 15:48:06 +11:00
gatecat
5007cd3603
Merge pull request #905 from YosysHQ/gatecat/nexus-disable-dcsroute
nexus: Hotfix to disable unimplemented DCS routethru
2022-02-03 21:40:30 +00:00
gatecat
84399caebe run clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
2022-02-03 15:28:46 +00:00
gatecat
d446a29987 nexus: Hotfix to disable unimplemented DCS routethru
Signed-off-by: gatecat <gatecat@ds0.me>
2022-02-03 14:59:25 +00:00
Maciej Kurc
3042f9e792 Fixed correction of Nexus OSCA frequency constraints
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2022-02-02 09:24:28 +01:00
Alessandro Comodi
676e56e5d4 nexus: add option to modify the mult factor of the estimate delay
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2022-02-01 11:18:17 +01:00
Maciej Kurc
e51e82d6a9 Added honoring OSCA output frequency tolerance during constraints generation
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2022-01-28 13:51:10 +01:00
Maciej Kurc
18f71ace8c Removed the need for MULT36_CORE bel for implementing the MULTADDSUB9X9WIDE macro
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2022-01-25 12:08:52 +01:00
Karol Gugala
500fa6f442 nexus: handle SLEWRATE in pdc 2021-12-20 15:09:03 +01:00
gatecat
ddb084e9a8 archapi: Use arbitrary rather than actual placement in predictDelay
This makes predictDelay be based on an arbitrary belpin pair rather
than a arc of a net based on cell placement. This way 'what-if'
decisions can be evaluated without actually changing placement;
potentially useful for parallel placement.

A new helper predictArcDelay behaves like the old predictDelay to
minimise the impact on existing passes; only arches need be updated.

Signed-off-by: gatecat <gatecat@ds0.me>
2021-12-19 17:15:15 +00:00
gatecat
a306860144 nexus: router1 speedup based on #867
Signed-off-by: gatecat <gatecat@ds0.me>
2021-12-17 15:06:19 +00:00
gatecat
35feb7ebba clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
2021-12-12 13:02:39 +00:00
Maciej Kurc
41accf84ce Added checking if all FFs added to an existing cluster have matching configuration
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2021-11-23 15:16:26 +01:00
Maciej Kurc
238da79e52 Fixed potential issues with carry-chain cluster expansion, added a parameter controlling the ratio of FFs that got glued to carry-chain clusters.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2021-11-22 13:13:28 +01:00
Maciej Kurc
5bc97c94ae Added appending FFs to other existing LUT cluster types (carry, widefn)
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2021-11-22 10:23:24 +01:00
Maciej Kurc
086bcf0615 Added an option to control LUT and FF packing
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2021-11-22 10:23:24 +01:00
Maciej Kurc
d97f93ee88 Added clustering free LUTs and FFs
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2021-11-22 10:23:24 +01:00
gatecat
718ee441a0 nexus: Add resource cost overrides
Signed-off-by: gatecat <gatecat@ds0.me>
2021-09-24 19:19:26 +01:00
gatecat
502fcff765 nexus: LUT permutation support
Signed-off-by: gatecat <gatecat@ds0.me>
2021-09-24 15:26:16 +01:00
gatecat
24f13ec942
Merge pull request #822 from YosysHQ/gatecat/nexus-split-vcc
nexus: Support for split Vcc routing
2021-09-23 13:04:04 +01:00
gatecat
b2e9ce46f1
Merge pull request #823 from YosysHQ/gatecat/nexus-r1-tweaks
nexus: Tweaks for router1 performance
2021-09-22 22:04:56 +01:00
gatecat
f395ad3e27 nexus: Support for split Vcc routing
Signed-off-by: gatecat <gatecat@ds0.me>
2021-09-22 15:00:59 +01:00
gatecat
fed682ee5f nexus: Tweaks for router1 performance
Signed-off-by: gatecat <gatecat@ds0.me>
2021-09-22 14:55:10 +01:00
gatecat
53e94653f3 nexus: Fix DSP macro placement
Signed-off-by: gatecat <gatecat@ds0.me>
2021-09-22 13:12:21 +01:00
Maciej Kurc
80e2f8a791 Added support for syn_useioff for enabling tri-state control FF integration into IOLOGIC.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2021-09-20 11:35:36 +02:00
Maciej Kurc
8ffd30cb2d Use correct names for IDDRX1_ODDRX1 FASM features
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2021-09-17 15:52:56 +02:00
Maciej Kurc
ef9eee6b15 Added automatic inference and integration of FFs driving T pin into IOLOGIC
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2021-09-17 13:49:35 +02:00
Maciej Kurc
6948d41616 Added handling of the case when tri-state control net bypasses SIOLOGIC bel
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2021-09-17 13:49:35 +02:00
gatecat
fd6366f027 nexus: Fix getBelGlobalBuf
Signed-off-by: gatecat <gatecat@ds0.me>
2021-09-02 17:23:11 +01:00
gatecat
504199e70e nexus: Fix routeing of global clocks that also drive fabric
Signed-off-by: gatecat <gatecat@ds0.me>
2021-07-28 15:35:19 +01:00
gatecat
5686fdcf1c nexus: Basic packer and FASM support for I/ODDR
Signed-off-by: gatecat <gatecat@ds0.me>
2021-07-28 13:27:02 +01:00