gatecat
1febb80a1e
Add nextpnr-gowin binary to gitignore
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Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-09 10:36:03 +00:00
gatecat
bcf81f0e71
Merge pull request #568 from YosysHQ/dave/arch-override
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Create a new BaseArch that formally specifies the Arch API and provides some base implementations
2021-02-08 17:56:08 +00:00
gatecat
2932dc3985
Make BaseCtx destructor virtual
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Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-08 17:03:22 +00:00
D. Shah
f501ba0c77
Update prjoxide URL
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Signed-off-by: D. Shah <gatecat@ds0.me>
2021-02-08 13:04:49 +00:00
David Shah
23edefa0b5
Merge pull request #572 from YosysHQ/dave/more-ssize
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Use RelSlice::ssize instead of cast-to-int throughout
2021-02-08 12:05:58 +00:00
D. Shah
0d444bfc6e
Use RelSlice::ssize instead of cast-to-int throughout
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-08 11:24:00 +00:00
D. Shah
697c4fd08b
Update docs with API changes
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-08 11:08:45 +00:00
D. Shah
9deb9e6e85
interchange: Base on ArchAPI
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-08 10:41:03 +00:00
D. Shah
efca63862c
Use 'T' postfix to disambiguate LHS and RHS of using
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Arches might otherwise have range types named ambigiously with the entry
in ArchRanges.
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-08 10:29:50 +00:00
D. Shah
3e631fe2f4
Add archArgs and archArgsToId to Arch API
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
6575bfac3e
gowin: Switch to BaseArch
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
c7ef7e1902
generic: Base upon ArchAPI
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As generic is often picked as our 'odd-one-out' we also use it as an
example of an Arch that does not build upon BaseArch.
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
f5d2e245e1
nexus: Switch to BaseArch
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
59c3db46ca
ice40: Switch to BaseArch
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
a8a27299ae
Add pure-virtual ArchAPI interface
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This splits out the pure-virtual definition of the architecture API into
ArchAPI; leaving BaseArch to only provide default implementations (which
can now be completely opted out of by deriving from ArchAPI instead of
BaseArch).
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
b4227f586c
Rename ArchBase to BaseArch for consistency with BaseCtx
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
297cd026b9
Add default implementation of bel bucket functions
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
ed8e3c83d9
Add default implementation of some range-returning functions
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
6d794abf49
Add a few more functions to ArchBase
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
d4363b7ee5
ecp5: Use common wire/pip binding
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
b866601b63
Fix now-illegal use of reinterpret_cast
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
ba5568d501
nextpnr: Example of shared wire/bel/pip binding code
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Currently not actually being tested
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
cfa9a9daec
nextpnr: Use templates to specify range types
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
8f76af40db
nextpnr: Add base virtual functions for non-range Arch API
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This makes the Arch API clearer and also allows a base implementation of
functions to reduce the amount of complexity to get a basic Arch up and
running.
Currently this only implements these for functions that don't return a
range. Range-returning functions will require more work in order due to
the current 'duck typing' approach (probably a struct that contains the
range types combined with templating.)
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
David Shah
8b4163b77c
Merge pull request #567 from litghost/initial_fpga_interchange
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Initial FPGA interchange arch
2021-02-05 19:15:29 +00:00
Keith Rothman
a0ee42833b
Add RelSlice::ssize and use it when comparing with signed ints.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-05 10:12:13 -08:00
Keith Rothman
9557047e5e
Move all string data into BBA file.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-05 09:22:55 -08:00
David Shah
b0f9b7834e
Merge pull request #570 from litghost/make_id_string_list_explicit
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Mark IdString and IdStringList single argument constructors explicit.
2021-02-05 11:32:09 +00:00
D. Shah
450bfae86c
generic: Fix pin names accidentally being IdStringList not IdString
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Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 10:43:35 +00:00
Keith Rothman
ca32e935a6
Use RelSlice instead of RelPtr in cases where sizes are present.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:34 -08:00
Keith Rothman
f1ee2fde58
Update APIs to conform to style guide.
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- Change non-Arch methods to snake_case
- Adds some utility functions to for accessing bel_data.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:34 -08:00
Keith Rothman
9afa8a9bea
Remove unused method getReservedWireNet.
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This was a holdover from the nextpnr-xilinx arch.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
22c3c9c303
Update copywrite headers.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
58c90184f6
Correct some typos.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
d8fa9d7f36
Fix warnings with signed/unsigned.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
d4f66a73c1
Fix fpga_interchange/README.md duplicate patch statement.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
90ece77f8d
Fix URLs in Markdown.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
dc47c6d9ec
Add empty constids.inc for build.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
0b911e484c
Run "make clangformat".
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
149087b880
Add README about initial state of FPGA interchange implementation.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
78737ab01d
Update FPGA interchange to use IdStringList.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
083f6afb1c
Add initial GUI files.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
4a62c8c2eb
Start adding data for placement constraint solving.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
5c16c5024d
Debug BEL bucket data.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
cd41c4001e
Add initial updates to FPGA interchange arch for BEL buckets.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
67dc19bb57
Address review comments.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
5a89dc58e1
Fix BBA import bugs.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
1dd24f6461
Assorted fixes to new FPGA interchange based arch.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
6e68e8f097
Initial compiling version.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:32 -08:00
Keith Rothman
561b519716
Initial FPGA interchange (which is just a cut-down xilinx arch).
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:32 -08:00