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Author SHA1 Message Date
Eddie Hung
236ca15b49 Place blinky BUFG in dedicated location for input pin 2018-12-06 18:02:10 -08:00
Eddie Hung
8c44888466 Fix delay prediction 2018-12-06 17:40:15 -08:00
Eddie Hung
904860b2b4 Add comment 2018-12-06 16:53:48 -08:00
Eddie Hung
66f22150b1 Improve estimateDelay for global clocks 2018-12-06 16:49:35 -08:00
Eddie Hung
c708a4e0d3 Fix leftover divide by 2 in Arch::estimateDelay() 2018-12-06 16:11:15 -08:00
Eddie Hung
557011cfe6 Have a go at generating FASM from Torc XDL 2018-12-06 14:51:24 -08:00
Eddie Hung
5f75a8447f Merge in vx980t support 2018-12-06 20:07:51 +00:00
Eddie Hung
20f0353f76 Add report to attosoc_tb.vhd 2018-12-02 15:41:30 -08:00
Eddie Hung
b1b8183967 Re-enable PLL in attosoc.v 2018-12-02 15:41:03 -08:00
Eddie Hung
8f0e888815 nextpnr now writes to log, netgen to overwrite 2018-12-02 15:40:20 -08:00
Eddie Hung
5aff7bbbc4 Fix INIT of pass-thru LUT to be "2" not "1" 2018-12-02 15:32:29 -08:00
Eddie Hung
5ddfc32c75 Add attosoc.sh and attosoc_tb.vhd 2018-11-30 17:06:55 -08:00
Eddie Hung
4574a57efc Add attosoc 2018-11-30 15:24:32 -08:00
Eddie Hung
fdca3d6d77 firmware.hex with delay loop 2018-11-30 15:23:09 -08:00
Eddie Hung
cac7ce2747 Cleanup 2018-11-29 17:20:51 -08:00
Eddie Hung
f4e7f4e690 Use wholesale attrs from ISE for MMCME2_ADV 2018-11-29 17:20:35 -08:00
Eddie Hung
2fdf937259 Assignment LUT inputs from fastest down 2018-11-29 17:08:05 -08:00
Eddie Hung
0327fa554a Revert "Ahead of LUT input swapping, assign LUT<6 from A6 downwards" 
This reverts commit ec96897c1d.
 2018-11-29 16:54:33 -08:00
Eddie Hung
c5165f7830 Duplicate arcs.clear() 2018-11-29 16:32:33 -08:00
Eddie Hung
d7dd945f55 Overwrite COMPENSATION attribute on MMCME2_ADV to "INTERNAL" 2018-11-29 16:32:08 -08:00
Eddie Hung
d8b6b231de Move required attributes to pack 2018-11-29 15:38:28 -08:00
Eddie Hung
6985e80c01 Merge branch 'xc7' of gitlab.com:eddiehung/nextpnr into xc7 2018-11-29 13:32:32 -08:00
Miodrag Milanovic
535fc953d4 Use site x location to determine if it is one block or other 2018-11-29 12:44:02 -08:00
Eddie Hung
9f03d9eed3 Add PLL to bring 125MHz clock to 60MHz for picorv32 2018-11-29 12:25:39 -08:00
Eddie Hung
4161856d49 Add support for MMCME2_ADV 2018-11-28 22:34:22 -08:00
Miodrag Milanovic
bfa2157ae6 compile fix for gui and proper size 2018-11-28 17:59:58 +01:00
Miodrag Milanovic
f2fecc3c69 make gui run 2018-11-28 17:04:26 +01:00
Eddie Hung
13e7798b34 Fix #endif placement 2018-11-27 18:11:19 -08:00
Eddie Hung
212b03999b Gzip the torc_info data 2018-11-27 18:08:03 -08:00
Eddie Hung
440802bf9d Add support for serialization of torc_info 2018-11-27 17:55:31 -08:00
Eddie Hung
662733c171 Remove methods 2018-11-27 14:12:25 -08:00
Eddie Hung
a0b6d3b19b clangformat 2018-11-27 12:28:48 -08:00
Eddie Hung
ae9ccfa5ad Refactor torc_info constructor 2018-11-27 12:28:21 -08:00
Eddie Hung
664c48f5e4 Merge https://github.com/YosysHQ/nextpnr into xc7 2018-11-27 09:45:35 -08:00
David Shah
cdfd35e6aa
Merge pull request #150 from YosysHQ/err_warn_count 
Print warning and error count at end of execution
 2018-11-26 19:37:03 +00:00
David Shah
4a44bc569a Print warning and error count at end of execution 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-26 19:14:38 +00:00
David Shah
0adc0d7529 timing: Improve clock constraint log output 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-26 18:56:10 +00:00
David Shah
86108bfd39
Merge pull request #149 from smunaut/issue_148 
Fixes for global promotion
 2018-11-26 18:11:16 +00:00
David Shah
5a1190ade2 ecp5: Fix UR PLL tile coordinates 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-26 15:35:55 +00:00
Sylvain Munaut
584e8c58a6 ice40: During global promotion, only promote if this will actually fit ! 
We need to take into account the global networks that are already used
and possibly locked to know what we can promote since all networks
can't drive resets / clock-enables

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-26 12:51:14 +01:00
Sylvain Munaut
a79f0db749 ice40: Add helper to know which global network is driven by a SB_GB Bel 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-26 12:51:14 +01:00
Sylvain Munaut
822b525035 placer1: During initial placement, don't rip-up strongly binded cells 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-26 12:51:14 +01:00
David Shah
024db62ef0 Update README.md 
Fixes #74

Signed-off-by: David Shah <dave@ds0.me>
 2018-11-26 09:47:16 +00:00
David Shah
fe670cf3f6 clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-26 09:37:39 +00:00
David Shah
bbeab72ad9
Merge pull request #143 from daveshah1/ecp5_muxes 
ecp5: Adding support for LUT extension muxes up to LUT7
 2018-11-26 09:37:18 +00:00
David Shah
22ac41d627
Merge pull request #138 from YosysHQ/refactor_log 
Tidy up logging code, add log file support, make timing failures non-fatal errors
 2018-11-26 09:37:07 +00:00
David Shah
98858fe611
Merge pull request #139 from YosysHQ/fix_117 
router1: Fix unrouted, undriven nets
 2018-11-26 09:36:58 +00:00
David Shah
eda77a5244 json: Remove superfluous floating node message 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-26 09:36:43 +00:00
David Shah
fe2fa0e3ed ice40: Improve PCF error handling 
Fixes #147

Signed-off-by: David Shah <dave@ds0.me>
 2018-11-26 09:34:28 +00:00
David Shah
2c6a2c40e1 Merge branch 'master' of github.com:YosysHQ/nextpnr 2018-11-26 09:23:31 +00:00