caiyu/nextpnr
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
271 Commits 22 Branches 7 Tags 17 MiB
246fe999dd
Commit Graph

56 Commits

Author SHA1 Message Date
Clifford Wolf
246fe999dd Move TileInfoPOD to chipdb blob 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 15:15:49 +02:00
Clifford Wolf
1f9c28ba58 Move SwitchInfoPOD to chipdb blob 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 15:05:17 +02:00
Clifford Wolf
3b5c33d685 Move WireInfoPOD into ChipDB binary blob 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 14:30:26 +02:00
Clifford Wolf
84defd3fee Minor refactoring of BinaryBlobAssembler, fix alignments 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 13:32:38 +02:00
Clifford Wolf
69e5bc5030 Progress with chipdb refactoring 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-16 19:25:37 +02:00
Clifford Wolf
ee06db3293 Progress with chipdb refactoring 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-16 18:42:29 +02:00
Clifford Wolf
f0edb625e3 Progress with chipdb refactoring 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-16 17:53:09 +02:00
Clifford Wolf
4d14bc2914 Merge remote-tracking branch 'origin/master' into chipdbng 2018-06-16 15:25:03 +02:00
Clifford Wolf
6acf23cf37 Some refactoring of Chip API (prep for chipdb refactoring) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-16 15:23:04 +02:00
David Shah
cabdfe3616 ice40: Only place IO at valid pins 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
Clifford Wolf
312699e590 Add route-ripup routing loop 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-14 15:09:13 +02:00
Clifford Wolf
7787ce5fd9 Refactor position/delay estimation API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-14 12:43:00 +02:00
Clifford Wolf
d80e60cce2 Add hierarchy to bel/wire/pip names 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 14:53:44 +02:00
Clifford Wolf
1e314cc0ce Update chip Graphics API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 12:48:58 +02:00
Clifford Wolf
145c849596 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-13 12:38:28 +02:00
Clifford Wolf
4d7f18dd98 Redesign PosInfo API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 12:37:23 +02:00
David Shah
de0918c287 ice40: Add a PCF parser 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 12:30:15 +02:00
David Shah
5435a97024 ice40: Add package selection 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 11:51:09 +02:00
David Shah
696aaee24c ice40: Add package pins to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 11:40:28 +02:00
Clifford Wolf
9c275d0a65 Add fast IdString <-> PortPin conversion 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 15:50:33 +02:00
Clifford Wolf
a139654980 Add IdString API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 15:08:01 +02:00
Clifford Wolf
426fb75bb5 Fix NEXTPNR_NAMESPACE 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 14:31:26 +02:00
Clifford Wolf
d62e341d5a Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-12 14:25:12 +02:00
Clifford Wolf
391d49c13e Add nextpnr namespace 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 14:24:59 +02:00
David Shah
031d8e811f ice40: Adding a placement validity checker 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 13:40:22 +02:00
Clifford Wolf
be73894bea Add "nextpnr.h" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 20:12:57 +02:00
Clifford Wolf
ac67482380 Remove pool, dict, vector namespace aliases 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 19:56:33 +02:00
Clifford Wolf
f63eec034f Add conflicting=false argument to bind getters 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 19:46:03 +02:00
Miodrag Milanovic
67227847e5 Pass design to gui, display chip name 2018-06-10 18:25:23 +02:00
David Shah
d3f1112580 Improving 5k support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 17:20:29 +02:00
Clifford Wolf
602e6fab1e Add support for iCE40 global buffers (currently only for 1k devices) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 16:31:06 +02:00
Clifford Wolf
4a79e70470 Fix ice40 pip/switch locked performance issue 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 14:08:00 +02:00
David Shah
30e672313d ice40: Add IO config to bitstream 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 13:24:48 +02:00
David Shah
6da8f98eac ice40: Lock out mutually exclusive pips 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 12:17:55 +02:00
David Shah
d0431225f1 ice40: Writing an empty ASC file 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 11:56:07 +02:00
David Shah
89d5280bf6 ice40: Adding non-routing config bits to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 11:14:50 +02:00
David Shah
48b72126c9 ice40: Add switch data to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 10:54:55 +02:00
Clifford Wolf
8cabb39d6d Getting rid of .nil() methods, compare with zero- and default-constructed objects instead 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 18:41:38 +02:00
Clifford Wolf
dfbfbf87db Add very basic router 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 18:19:20 +02:00
ZipCPU
4499864024 Applied clang-format to my own contributions 2018-06-07 15:38:24 -04:00
ZipCPU
c13c15bada Set the default log to stdout 2018-06-07 09:52:32 -04:00
ZipCPU
f32b9622d5 Initial (random) placer capability 
This commit also includes changes to jsonparse to allow it to
1) recognize ports with no connection, and set their net pointers to NULL
2) recognize designs with a ports node rather than a ports_direction

The rule checker has also been modified to accommodate possible NULL netlists

The ice40 chip now also has iterator operations ++bi and bi++.
 2018-06-07 09:38:14 -04:00
David Shah
547d4fe3ee ice40: Refactor PortPin and add Python binding 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 14:36:35 +02:00
Clifford Wolf
1ea8fa4881 clang-format for design and chip codebase 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-07 12:56:49 +02:00
Clifford Wolf
72b4bba0e7 Add ice40 geometry information 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-06 16:42:42 +02:00
Clifford Wolf
f07682f515 Add ice40 --test mode 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-06 16:01:31 +02:00
Clifford Wolf
5ff9aafb20 Refactor Chip API and iCE40 database 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-06 15:13:41 +02:00
Clifford Wolf
d13a84b687 Add iCE40 blockram bels 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-04 12:37:56 +02:00
Clifford Wolf
eb3c89bee9 Replace GuiLine with GraphicElement 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-04 12:02:58 +02:00
Clifford Wolf
6840ffd9c0 Add iCE40 SB_IO bels 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-03 16:16:59 +02:00