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1295 Commits

Author SHA1 Message Date
gatecat
7b0e082000 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-11-07 09:02:35 +01:00
gatecat
fe52840054 archapi: Add new API for global constant routing 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-11-07 09:00:03 +01:00
Lofty
214cc4315e static: density multiplier should be a vector 2023-11-07 08:18:35 +01:00
Lofty
d6f54fd9df ice40: add static placer support 2023-10-29 08:46:33 +01:00
gatecat
74d7ebc71f clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-10-28 17:10:42 +02:00
Justin Rajewski
95f0a19391 Fixes for building on windows 2023-10-26 21:21:14 +02:00
Justin Rajewski
1238b69d74 Fixes for building on windows 2023-10-26 21:21:14 +02:00
gatecat
0eb9a9ad02 placer_static: Initial prototype 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-10-02 14:56:40 +02:00
rowanG077
e8602fb56d std::numeric_limits<delay_t>::lowest() -> ::min() 2023-09-28 16:27:15 +02:00
Wanda
c07ca64ebe hashlib: Improve pool hash function. 2023-09-27 17:08:29 +02:00
rowanG077
3f2e550f51 tmg: Fix logging of slack histogram 2023-09-25 13:20:40 +02:00
rowanG077
38d2a4b844 tmg: Fix argument order in run method 
Router 2 expects "update_route_delays" to be the first argument to `tmg.run`.
 2023-09-25 13:20:40 +02:00
YRabbit
f5996ff4a1 gowin: Himbaechel. Support DragonFlyBSD 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-09-16 07:38:57 +02:00
YRabbit
8a54e5ec1c gowin: Himbaechel. Support DragonFlyBSD 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-09-16 07:38:57 +02:00
YRabbit
165e89f49a gowin: Himbaechel. Support DragonFlyBSD 
We add support right here so that later I don’t have to make patches to the ports.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-09-16 07:38:57 +02:00
gatecat
565927dfcc himbaechel: Add discovery of uarch and chipdb 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-09-15 08:23:43 +02:00
gatecat
e08471dfaf router2: Improve robustness when critical nets conflict 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-08-24 09:20:44 +02:00
rowanG077
053dfc98f0 use std::numeric_limits instead of macros 2023-08-18 09:15:37 +02:00
rowanG077
1fdd683344 Do not use C++20 struct initilisation 2023-08-18 09:15:37 +02:00
rowanG077
240f89081f Add back error/warning for combinational loops 2023-08-18 09:15:37 +02:00
rowanG077
d2a489d5e9 Remove old timing analyser 2023-08-18 09:15:37 +02:00
rowanG077
b0820eeaaa Formatting and display async path in json report 2023-08-18 09:15:37 +02:00
rowanG077
cfd3a52a3c tmg: add timing_report 2023-08-18 09:15:37 +02:00
rowanG077
596873c302 tmg: Add net_timings, crit path and slack hist 2023-08-18 09:15:37 +02:00
rowanG077
8b51674a6b Add critical path report to modern timing engine 2023-08-18 09:15:37 +02:00
rowanG077
d9f009b570 Split timing into old and new code 2023-08-18 09:15:37 +02:00
gatecat
54b2045726 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-06-20 10:58:18 +02:00
rowanG077
914999673c Rip out budgets 2023-06-20 10:57:10 +02:00
Lofty
cbd6496d35 router2: fix 8935c186 (again) 2023-06-19 13:47:23 +02:00
Lofty
787fac7649 router2: fix 8935c186 2023-06-14 03:40:48 +01:00
Lofty
71a6b99633 router2: revisit nodes with lower delay 2023-06-13 08:24:01 +01:00
Lofty
8935c1867f router2: revisit nodes with lower cost 2023-06-13 08:24:01 +01:00
Rowan Goemans
0f947ee693
Timing: Fix combinational paths through all ports (#1175) 
Fixes https://github.com/YosysHQ/nextpnr/issues/1174
 2023-06-12 10:25:01 +02:00
Rowan Goemans
5b958c4d80
Analyse async paths in TimingAnalyser (#1171) 2023-06-09 08:01:47 +02:00
Lofty
5936464967
router2: add alternate weight option (#1162) 2023-05-25 10:47:10 +02:00
Meinhard Kissich
f03da6568b
Fix segfault when clocking a FF from a ring oscillator (#1160) 
* fix segfault when clocking a FF from a ring osc

* Change std::set to pool

Co-authored-by: Lofty <dan.ravensloft@gmail.com>

---------

Co-authored-by: Meinhard Kissich <meinhard.kissich@tugraz.at>
Co-authored-by: Lofty <dan.ravensloft@gmail.com>
 2023-05-22 09:39:05 +02:00
gatecat
1d3e5151ba clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-05-19 09:00:31 +02:00
gatecat
ea925f39fb archapi: Add getArcDelayOverride 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-05-17 09:54:14 +01:00
Nathaniel Quillin
ca2e328a5f rename c++20 keyword s/requires/requires_range. 
See https://en.cppreference.com/w/cpp/language/requires for more details.
 2023-05-16 12:43:40 +02:00
gatecat
e4fcd3740d cmake: Make HeAP placer always-enabled 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-03-17 10:38:11 +01:00
gatecat
132a98a91d router1: Add error when dest port has no wire 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-03-06 14:15:48 +01:00
Catherine
ebbaf8c08d common: disable parallel refinement only without threads. 
Previously it was always disabled on WebAssembly builds.
 2023-02-23 09:45:19 +01:00
Catherine
8f0731edc9 common: update deprecated use of boost::filesystem::basename. 2023-02-23 09:44:46 +01:00
Catherine
4b4f4a7da1 common: add missing includes for libc++. 2023-02-23 02:32:19 +00:00
Thomas W Rodgers
825d646196 Include <cstdint> in common/kernel/hashlib.h 
The definitions for uint32_t, uint64_t report as undefined when
compiling under GCC13. They were previously found by transitive
includes, but this is not guaranteed to work, and GCC13 forced
the issue.
 2023-02-18 10:26:01 -08:00
rowanG077
32e818204e common: Print out generated seed value 2023-02-16 12:02:00 +01:00
rowanG077
3608c3eb02 common: Implement Werror flag 2023-02-13 10:52:05 +01:00
gatecat
9b5e5f124c clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-01-25 10:29:32 +01:00
gatecat
7845b66512 Add missing <set> includes 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-01-20 09:04:41 +01:00
gatecat
6079326633 context: Add getNetinfoRouteDelayQuad 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-01-18 16:28:33 +01:00
gatecat
f89b959b5f clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-01-02 09:33:11 +01:00
Miodrag Milanovic
64f7306b24 initialize netShareWeight 2022-12-22 20:16:13 +01:00
Miodrag Milanovic
4af8964069 propagate netShareWeight 2022-12-22 16:11:10 +01:00
Miodrag Milanovic
bd628ce591 Remove deprecated functions 2022-12-22 15:26:39 +01:00
myrtle
a80d63b268
Merge pull request #1066 from arjenroodselaar/place_timeout 
Timeout when legal placement can't be found for cell
 2022-12-21 07:10:09 +00:00
Arjen Roodselaar
be1f700b0b Set divisor instead of absolute value 2022-12-20 13:10:37 -08:00
Arjen Roodselaar
923458a2c9 Allow setting cell placement timeout 2022-12-20 11:15:06 -08:00
Arjen Roodselaar
d5299f144f Add --no-placer-timeout flag to override timeout during refinement 2022-12-19 22:58:52 -08:00
Arjen Roodselaar
2712cbf6e4 Increase timeout 2022-12-19 14:00:19 -08:00
Arjen Roodselaar
6e0311efca Timeout when legal placement can't be found for cell 2022-12-17 16:07:57 -08:00
gatecat
ccb573298c heap: encourage more spreading of heterogenous chains 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-12-17 10:50:20 +00:00
gatecat
603b60da8d api: add explain_invalid option to isBelLocationValid 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-12-07 10:27:58 +01:00
gatecat
d1afd6c0f1 heap: Remove custom bounding-box type 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-12-07 10:02:16 +01:00
gatecat
e260ac33ab refactor: ArcBounds -> BoundingBox 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-12-07 10:00:53 +01:00
gatecat
c62a947a28 api: Make NetInfo* of checkPipAvailForNet const 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-12-02 14:20:39 +01:00
gatecat
8a69bd0735 Fix "implicit copy constructor for 'Property' is deprecated" 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-11-10 10:57:41 +01:00
gatecat
445d32497d run clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-10-17 12:35:02 +02:00
airskywater
9572f6f032
Modify code to meet the code style preferences 2022-09-24 14:46:35 +08:00
airskywater
c702e15a3f
Add more sanity check for pointers 2022-09-24 12:03:44 +08:00
airskywater
78f67ae5bc
fix runtime segmentation fault 
disable null pointer dereference!
 2022-09-24 11:35:40 +08:00
myrtle
f4e6bbd383
Merge pull request #1019 from antmicro/support-clock-relations 
Support cross-domain clock relations in timing analyser
 2022-09-20 15:55:43 +02:00
Maciej Kurc
9000c41c4b Added the --ignore-rel-clk option to control timing checks for cross-domain paths, formatted code 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2022-09-20 14:40:40 +02:00
gatecat
415c097df8 router2: Reserve source wire, too 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-09-20 13:42:51 +02:00
Maciej Kurc
1f1bae3e23 Code cleanup 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2022-08-31 16:19:15 +02:00
Maciej Kurc
60a6e8b070 Added timing check for cross-domain paths for related clocks 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2022-08-31 14:15:33 +02:00
Maciej Kurc
9a61ad9234 Augmented TimingAnalyser class with detection of clock to clock relations 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2022-08-30 17:30:58 +02:00
Miodrag Milanovic
a00b997cf1 add missing overrides 2022-08-22 12:35:24 +02:00
Miodrag Milanovic
1aa797b820 Fix parameter order 2022-08-22 12:32:50 +02:00
gatecat
05167fcb8b pybindings: Mark CellInfo::bel as readonly 
bel bindings should be updated with bindBel/unbindBel during placement, or setting the BEL attribute for constraints before placement.

Fixes #522

Signed-off-by: gatecat <gatecat@ds0.me>
 2022-08-18 15:09:41 +02:00
gatecat
77c82b0fbf refactor: id(stringf(...)) to new idf(...) helper 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-08-10 10:57:46 +01:00
gatecat
09e388f453 netlist: Add PseudoCell API 
When implementing concepts such as partition pins or deliberately split
nets, there's a need for something that looks like a cell (starts/ends
routing with pins on nets, has timing data) but isn't mapped to a fixed
bel in the architecture, but instead can have pin mappings defined at
runtime.

The PseudoCell allows this by providing an alternate, virtual-function
based API for such cells. When a cell has `pseudo_cell` used, instead of
calling functions such as getBelPinWire, getBelLocation or getCellDelay
in the Arch API; such data is provided by the cell itself, fully
flexible at runtime regardless of arch, via methods on the PseudoCell
implementation.
 2022-07-08 14:30:57 +02:00
gatecat
e1ba379fb7 generic: Use arch_pybindings_shared 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-07-04 18:39:00 +02:00
gatecat
447b5b905c Don't assert on mixed domain paths in report 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-05-22 13:56:36 +01:00
YRabbit
1aa693732c common: Correct a minor typo in the message 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2022-05-10 21:19:02 +10:00
gatecat
19cade3b3b prefine: Do full-tile swaps, too 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-04-19 18:37:16 +01:00
gatecat
61b3e2e1ff Move general parallel detail place code out of parallel_refine 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-04-17 20:10:49 +01:00
gatecat
49f178ed94 Split up common into kernel,place,route 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-04-08 13:42:54 +01:00
gatecat
774d3944b3 parallel_refine: Fix compile error with some configs 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-03-19 18:43:31 +00:00
YRabbit
e3b9c971f9 BUGFIX: disable the thousands separator 
The wire numbers are very large and it is undesirable to use a thousand
separator there. This is a side effect of enabling locale.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2022-03-16 15:05:27 +10:00
YRabbit
53ddbbaa85 Set the locale as early as possible 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2022-03-16 05:39:55 +10:00
gatecat
df7e26c1aa clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-03-09 17:12:59 +00:00
Catherine
626eccdb89 Add missing part of commit aee35768. 2022-03-08 17:24:29 +00:00
Catherine
aee35768f4 Disable parallel refinement on WebAssembly. 2022-03-05 16:32:44 +00:00
gatecat
cc9f99a80c parallel_refine: New, parallelised placement refinement pass 2022-03-03 18:37:53 +00:00
gatecat
86699b42f6 Switch to potentially-sparse net users array 
This uses a new data structure for net.users that allows gaps, so
removing a port from a net is no longer an O(n) operation on the number
of users the net has.

Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-27 13:47:05 +00:00
gatecat
434a9737bb Add indexed_store container type 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-26 15:11:33 +00:00
gatecat
75c45dbef1 Add IdStringList::concat overrides taking IdString 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-20 18:26:17 +00:00
gatecat
6a32aca4ac refactor: New member functions to replace design_utils 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-18 11:13:18 +00:00
gatecat
30fd86ce69 refactor: New NetInfo and CellInfo constructors 2022-02-16 15:10:57 +00:00
gatecat
84399caebe run clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-03 15:28:46 +00:00