caiyu/nextpnr
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4,779 Commits 22 Branches 7 Tags 17 MiB
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43 Commits

Author SHA1 Message Date
gatecat
9b51c6e337 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2024-09-30 14:51:33 +02:00
gatecat
1d3e5151ba clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-05-19 09:00:31 +02:00
Lofty
7a827b1c78 mistral: improve timing calculation 2023-05-17 20:38:03 +02:00
gatecat
98121308e0 mistral: Don't allow route-through LUTs in carry-mode ALMs 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-05-17 10:31:52 +02:00
gatecat
bc7b8b63ed mistral: Add a basic global clock router 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-05-16 18:17:06 +02:00
gatecat
603b60da8d api: add explain_invalid option to isBelLocationValid 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-12-07 10:27:58 +01:00
gatecat
e260ac33ab refactor: ArcBounds -> BoundingBox 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-12-07 10:00:53 +01:00
gatecat
c62a947a28 api: Make NetInfo* of checkPipAvailForNet const 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-12-02 14:20:39 +01:00
Lofty
af6735bdf4 mistral: add M10K bel 2022-03-09 17:13:54 +00:00
gatecat
84399caebe run clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-03 15:28:46 +00:00
Olivier Galibert
27d38de612 Mistral: Use log_error, remove leftover debugging printf. 2022-01-19 08:42:29 +01:00
Olivier Galibert
91a0eb9367 Mistral: fix gpio OE, add hmc bypass support 2022-01-18 22:37:35 +01:00
Olivier Galibert
b5fc788153 Sync with the current state of mistral 2022-01-18 15:12:45 +01:00
gatecat
ddb084e9a8 archapi: Use arbitrary rather than actual placement in predictDelay 
This makes predictDelay be based on an arbitrary belpin pair rather
than a arc of a net based on cell placement. This way 'what-if'
decisions can be evaluated without actually changing placement;
potentially useful for parallel placement.

A new helper predictArcDelay behaves like the old predictDelay to
minimise the impact on existing passes; only arches need be updated.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-19 17:15:15 +00:00
Olivier Galibert
f88c119461 mistral: Add internal oscillator support 2021-10-17 14:26:24 +02:00
Olivier Galibert
206bb07506 mistral: Add support for cyclonev_hps_interface_mpu_general_purpose 2021-10-14 17:04:32 +02:00
gatecat
dd2c5942a4 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-10-11 19:35:23 +01:00
Lofty
0a0c9393c1 mistral: very basic timing info 2021-10-10 23:56:58 +01:00
gatecat
f5f7ef6864 mistral: Adding support for MLABs as memory 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-10-05 12:40:47 +01:00
Lofty
b88e86f366 mistral: Use MLABs as if they're LABs (for now) 
Signed-off-by: Lofty <dan.ravensloft@gmail.com>
 2021-08-17 16:02:49 +01:00
gatecat
e7db15d6a4 mistral: Fix pip binding check 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-08-14 20:23:05 +01:00
gatecat
6fbc9e8159 mistral: Remove mistral root argument 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-04 19:25:34 +01:00
gatecat
ecc19c2c08 Using hashlib in arches 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-02 15:05:19 +01:00
gatecat
cbedf52342 mistral: Fix nextpnr build with LLVM 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-02 10:44:03 +01:00
Lofty
b81ba2d6c2 mistral: add getChipName 
Signed-off-by: Lofty <dan.ravensloft@gmail.com>
 2021-05-15 22:50:56 +01:00
gatecat
9d7f90dd89 mistral: Add MISTRAL_CLKBUF cell type 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 21:28:48 +01:00
gatecat
3bb94192d5 mistral: Tidying up 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
7fbfd98b8a mistral: Speed up bel binding and checking 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
9221acc9e2 mistral: Fix ENA and ACLR bitstream generation 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
b2f45b1aab mistral: Account for TD input count limit 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
8c7fa8e6c9 mistral: Implement PIP locations, too 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
6ad329c540 mistral: Implement bounding boxes for router2 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
3313d5267a mistral: Adding FF control set reservation 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
27eb3be7da mistral: Add stub RBF generation 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
386b5b901c mistral: Implement some misc. things 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
c5d983066d mistral: Some preps for generating bitstreams 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
2612853238 mistral: Adding a function for computing ALM LUT masks 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
5d191f8297 mistral: Add IO packing 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
96f16c8635 mistral: Add a basic QSF parser 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
1b729d90d0 mistral: Add the 'pin style' stuff based on Nexus 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
d38ff14264 mistral: Working on ALM input assignment 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
e5e2f7bc62 mistral: Add stub pack/place/route functions 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
879ac39e53 mistral: Renamed arch from cyclonev 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00