caiyu/nextpnr
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89 Commits

Author SHA1 Message Date
Clifford Wolf
e03ae50e21 Get rid of PortPin and BelType (ice40, generic, docs) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-08 17:01:18 +02:00
David Shah
fd2174149c Fixing constraint placement bugs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 16:29:44 +02:00
David Shah
7e9209878c Reworking packer and placer to use new generic rel legaliser 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 15:00:32 +02:00
David Shah
483f1b772c ice40: Promote 'logic' globals as well as clock/enable/reset 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 09:56:56 +02:00
David Shah
0414c93403 ice40: Add HFOSC support, force fabric routing on oscillators for now 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-01 09:45:08 +02:00
Sergiusz Bazanski
85fc356fc1 clangformat 2018-08-01 03:59:27 +01:00
Eddie Hung
950f33c1bb clangformat 2018-07-25 17:53:01 -07:00
Sergiusz Bazanski
db4f2d2318 ice40: check PLL PACKAGEPIN drives only PLL, cosmetics 2018-07-25 11:47:24 +01:00
Sergiusz Bazanski
c554ab1ef0 clang-format 2018-07-25 11:32:40 +01:00
Sergiusz Bazanski
aad0d3eb35 ice40: support PLL40_*_PAD, fix pass-through LUT for LOCK 2018-07-25 11:32:21 +01:00
Sergiusz Bazanski
2039112a47 ice40: after review 2018-07-24 15:59:18 +01:00
Sergiusz Bazanski
b31e95f82c Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/pll 2018-07-24 15:54:03 +01:00
David Shah
5a170f286c ice40: Remove use of deprecated APIs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 15:52:56 +02:00
David Shah
4359197dfe ice40: Trim BRAM constant inputs, reduces routing congestion around BRAM 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 11:21:10 +02:00
Sergiusz Bazanski
90ba958abe ice40: fixes before review 2018-07-24 03:19:22 +01:00
Sergiusz Bazanski
fae7994bc3 clang-format 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski
065ea95eab ice40: Move spliceLUT back to pack.cc 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski
e6c7b14465 ice40: Refactor PLL/LOCK LUT splicing out into Arch:: 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski
69233385f8 ice40: Emit feed-through LUTs for PLL/LOCK 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski
db31c0625b ice40: Fail early on SB_PLL40_*_PAD cells 2018-07-24 02:55:38 +01:00
Sergiusz Bazanski
2b1f7875bb ice40: Implement emitting PLLs 2018-07-24 02:38:10 +01:00
David Shah
79dc910b40 ice40: Trim DSP inputs that are constant where appropriate 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-19 14:32:30 +02:00
David Shah
bff7d673ed ice40: Packer and bitstream gen support for MAC16s 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-19 14:03:48 +02:00
David Shah
08ceb8a059 ice40: Renaming 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-18 14:34:32 +02:00
David Shah
ddd94edfe0 ice40: Fixes for inverted clocks 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-18 14:01:19 +02:00
David Shah
70cfa7a6a4 ice40: Make assignArchArgs a Arch method; call also after legaliser 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-18 12:21:02 +02:00
David Shah
c75a924c3f ice40: Assign ArchArgs after packing 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-18 12:12:05 +02:00
Clifford Wolf
c05bea12e0 Add ctx->pack() API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-13 15:16:44 +02:00
Miodrag Milanovic
1cf8293019 Fixed macros and includes for MSVC 2018-07-03 08:53:44 +02:00
David Shah
302ccc14cf ice40: UltraPlus SPRAM working 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-29 19:58:08 +02:00
David Shah
3b90f3698f ice40: Fix carry packing in some degenerate cases 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-29 15:10:29 +02:00
David Shah
c0724a7e97 ice40: Only pack up to one SB_CARRY into a LC 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-27 16:24:44 +02:00
David Shah
28e851cf45 ice40: Fix IO packer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-27 16:16:38 +02:00
David Shah
885fe93a17 ice40: Carry packer bugfix 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-27 15:24:34 +02:00
David Shah
998ab2b20a ice40: Fixing the carry packer for a larger design 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-27 12:43:29 +02:00
David Shah
09c0d96105 ice40: Fixing packing of CIN constant drivers 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-26 20:02:19 +02:00
David Shah
21d5a04501 Carry chains now routable 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-26 15:55:50 +02:00
David Shah
6f12f2b7e8 Working on debugging the carry legaliser 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-26 15:06:59 +02:00
David Shah
29df577f14 Fixing packing of carry cells 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-26 14:37:01 +02:00
David Shah
ded9df61dc Working on debugging carry packer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-26 13:08:28 +02:00
Miodrag Milanovic
db890d3a81 nets and cells are unique_ptr's 2018-06-25 21:33:48 +02:00
David Shah
64208da1f9 ice40: Remove constant driver cells in packer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-25 16:29:37 +02:00
Miodrag Milanovic
a279720fc1 merge 2018-06-25 16:22:08 +02:00
Miodrag Milanovic
6de8b4ef7d some more memory leaks 2018-06-25 15:52:55 +02:00
David Shah
6d154cfa13 ice40: Creating a carry chain splitter function 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-25 15:39:46 +02:00
David Shah
1e8840b0f9 Update from increased clangformat line length 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-23 16:12:52 +02:00
David Shah
289fca0976 ice40: Move global net test to Arch 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-23 12:09:01 +02:00
Miodrag Milanovic
cb92c10b99 Cleanup almost all deprecation warnings 2018-06-23 09:42:48 +02:00
David Shah
8850f86a8a ice40: SB_LFOSC support, fabric routing only 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-22 19:21:39 +02:00
Clifford Wolf
aa81f9d648 Switched from clifford@clifford.at to clifford@symbioticeda.com for copyright headers 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-22 16:19:17 +02:00