Commit Graph

4848 Commits

Author SHA1 Message Date
Miodrag Milanovic
2830340870 Use extra tile information from chip database 2025-01-23 13:02:32 +01:00
Miodrag Milanovic
75d684d032 Use pass trough signals to validate architecture data 2025-01-22 16:02:55 +01:00
Miodrag Milanovic
e2b3e7e86f Display few more primitives 2025-01-21 11:47:31 +01:00
Miodrag Milanovic
dbcc9b734f Add USR_RSTN support 2025-01-20 08:41:36 +01:00
Miodrag Milanovic
5c142fc257 Add some timings 2025-01-17 11:12:17 +01:00
Miodrag Milanovic
6ee0098cf9 Add basic PLL support 2025-01-17 09:53:27 +01:00
Miodrag Milanovic
b3658c47e0 cleanup 2025-01-16 11:36:18 +01:00
Miodrag Milanovic
fb9471aced init DFF only when needed 2025-01-16 10:28:41 +01:00
Miodrag Milanovic
1adda174de DFF input can be constant 2025-01-15 17:02:51 +01:00
Miodrag Milanovic
a2e5ded5a6 cleanup 2025-01-15 15:10:10 +01:00
Miodrag Milanovic
86e947e9d2 Allow inversion for muxes 2025-01-15 13:01:54 +01:00
Miodrag Milanovic
9e2208adbe Handle muxes with constant inputs 2025-01-15 12:39:47 +01:00
Miodrag Milanovic
3b1b549aa3 Add forgotten virtual port renames 2025-01-14 17:01:10 +01:00
Miodrag Milanovic
1eac0528ab Few more DFF features 2025-01-14 16:45:48 +01:00
Miodrag Milanovic
3e6e0273dd Simplify inversion of special signals 2025-01-14 15:17:18 +01:00
Miodrag Milanovic
ea6cbf9804 Create reproducible chip database 2025-01-14 15:16:19 +01:00
Miodrag Milanovic
cb1f01f3a6 Some CC_DFF improvements 2025-01-14 14:21:50 +01:00
Lofty
7d84aefb7f debug print if route found with wrong polarity 2025-01-13 16:20:06 +00:00
Miodrag Milanovic
fdb2dd4c42 BUFG support 2025-01-13 13:16:58 +01:00
Miodrag Milanovic
2a41124378 Fix script 2025-01-10 09:16:23 +01:00
Miodrag Milanovic
e6450a179b Added MX2 and MX4 support 2025-01-09 14:27:21 +01:00
Miodrag Milanovic
94071078dc Add clock inversion pip 2025-01-08 15:02:56 +01:00
Lofty
005bffab48 Constrain routes to have correct inversion state 2025-01-08 13:46:02 +00:00
Miodrag Milanovic
1fc8809e18 Add CPE input inverters 2025-01-08 14:08:41 +01:00
Miodrag Milanovic
91a88dda77 Fix CC_L2T5 pack 2025-01-08 14:07:46 +01:00
Miodrag Milanovic
0987d5a2b9 Start work on BUFG support 2025-01-06 14:15:05 +01:00
Miodrag Milanovic
ed6f6a4d98 Use pin connection aliases 2025-01-03 15:06:52 +01:00
Miodrag Milanovic
5fb63c6a0c Update due to API changes 2024-12-27 14:34:12 +01:00
Miodrag Milanovic
6cc8c2ee54 Use device wrapper class 2024-12-27 10:04:18 +01:00
Miodrag Milanovic
f92728b826 Cleanup 2024-12-26 09:34:24 +01:00
Miodrag Milanovic
150428fe7b Prevent pass trough issues 2024-12-25 16:39:01 +01:00
Miodrag Milanovic
5f85167f8c Fix DFF pack 2024-12-25 15:48:09 +01:00
Miodrag Milanovic
4badd8bbbf Handle MUX flags 2024-12-25 14:36:33 +01:00
Miodrag Milanovic
d41f13bde9 pack DFF fixes 2024-12-25 08:54:54 +01:00
Miodrag Milanovic
63beb45950 Naive pack CC_DFF 2024-12-24 09:29:48 +01:00
Miodrag Milanovic
d09c901f67 Naive lut tree CPE pack 2024-12-23 09:37:23 +01:00
Miodrag Milanovic
cb990e3731 Keep just used connections for now 2024-12-21 12:24:26 +01:00
Miodrag Milanovic
f027bc3cf9 Cleanup 2024-12-21 12:15:03 +01:00
Miodrag Milanovic
81a1f02dcc Add LVDS support 2024-12-20 19:53:29 +01:00
Miodrag Milanovic
ab29eab513 More parameter checks 2024-12-20 13:48:02 +01:00
Miodrag Milanovic
b020a47bb8 Cleanup 2024-12-20 12:03:53 +01:00
Miodrag Milanovic
2f537d2ccc Fixed typo 2024-12-20 11:09:12 +01:00
Miodrag Milanovic
86d93849c8 Add IN1->RAM_O2 propagation 2024-12-20 11:03:10 +01:00
Miodrag Milanovic
757ed10047 GPIO initial work 2024-12-20 09:38:14 +01:00
Miodrag Milanovic
2b038faeb1 Fix script 2024-12-18 11:46:38 +01:00
Miodrag Milanovic
de2d551035 Start adding infrastructure for reading bitstream 2024-12-18 10:44:25 +01:00
Miodrag Milanovic
7f98c33d6b Add support for reading from config 2024-12-18 10:30:14 +01:00
Miodrag Milanovic
19f5d24b79 Restructure code 2024-12-18 08:56:54 +01:00
Miodrag Milanovic
503fafd574 Propagate errors 2024-12-17 10:52:19 +01:00
Miodrag Milanovic
8436191307 Use CCF to set IO location 2024-12-16 19:21:32 +01:00