If the REG_INPUTA_CLK and REG_INPUTB_CLK values are set, then we should
use the faster setup/hold timings for the 18x8 multiplier.
Similarly, check the value of REG_OUTPUT_CLK for whether or not to use
faster timings for the output.
This is based on how I currently understand the registers to work - if
anyone knows the actual rules for when each timing applies please do
chime in to correct this implementation if necessary.
Along the same lines, this PR does not address the case when the
pipeline registers are enabled, since it is not clear to me how exactly
that affects the timing.
Trying to parse this invalid LPF syntax:
LOCATE COMP "a" SITE "A1"
IOBUF PORT "a" IO_TYPE=LVCMOS33;
(note missing semicolon on first line) gives an assertion failure in
strip_quotes, because the fifth token is scanned as "A1"IOBUF (without
a trailing quote).
Avoid the problem by detecting extraneous input and issuing a more
specific error.
Tested and verified working: the trivial configuration:
module USRMCLK( USRMCLKI, USRMCLKTS );
input USRMCLKI, USRMCLKTS;
endmodule
module top( input clk );
reg[ 24:0 ] count = 0;
always @( posedge clk ) begin
count <= count + 1'b1;
end
USRMCLK mspi( .USRMCLKI( count[ 20 ] ), .USRMCLKTS( count[ 24 ] ) );
endmodule
produces the expected output (toggling at high frequency, toggling
tri-state at lower frequency) on an LFE5U-85 when fed with an appropriate
clock. See https://bayimg.com/AAnNKAAGO for an example. The top
(magenta) trace is the MCLK line.
- Lattice component EHXPLLL parameter compatibility, allowing to
pass an int parameter for the enum (as expected by trellis tile)
e.g. CLKOP_TRIM_DELAY : integer := 0;
If the user specifies a custom install prefix, chances are icestrom/trellis
are also in that prefix rather than the hardcoded /usr/local
Fixes#351
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
two other commit message of squashed commits:
CMake: Search for user lib inside trellis instead of libtrellis
CMake: Fix missing path component for share contents
