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Author SHA1 Message Date
Miodrag Milanovic
73f200fe74 Load chipdb from filesystem as option 2019-02-09 13:34:57 +01:00
David Shah
170bf8a5ec ice40: Don't create PLLOUT_B buffer for single-output PLL variants 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-09 10:41:22 +00:00
Eddie Hung
0639be7966 [tests] Update submodule 2019-02-08 07:02:07 -08:00
David Shah
4b7ec5cecb ecp5: Add --basecfg deprecation warning 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-08 13:52:39 +00:00
David Shah
882775acef ecp5: Embed baseconfig 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-08 13:44:15 +00:00
David Shah
db990d2175 clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-08 13:43:55 +00:00
David Shah
c900bcc949 Merge branch 'ecp5func' 2019-02-08 12:57:17 +00:00
David Shah
e929d221f3 ecp5: Adding DTR, OSCG, CLKDIVF, USRMCLK, JTAGG 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-08 12:34:22 +00:00
Eddie Hung
f3f404e81c [tests] Update submodule 2019-02-07 14:23:58 -08:00
Eddie Hung
3e18260815 Merge remote-tracking branch 'origin/master' into regressions 2019-02-07 13:59:39 -08:00
Eddie Hung
3927f8c9c0 Remove regressions; see PR#227 of where it will end up 2019-02-07 13:37:48 -08:00
Eddie Hung
09207cf91f [test] Update submodule pointer 2019-02-07 13:21:03 -08:00
Eddie Hung
1c5dab9d47 [tests] Move existing tests/* into submodule nextpnr-tests 2019-02-07 13:13:03 -08:00
Eddie Hung
a65d2e425c Rename from date to pr number 2019-02-07 09:48:04 -08:00
Eddie Hung
dea61e604f Add to regressions 2019-02-07 09:42:34 -08:00
Eddie Hung
f9f15e79cd Fix slack_histogram computation accessing num_bins+1 2019-02-07 09:26:41 -08:00
Miodrag Milanovic
bfc96cc962 Better resize, FPGAViewWidget minimal is now 320x200, fixes #222 2019-02-07 17:42:14 +01:00
Miodrag Milanovic
c6604a4582 Fix reading conflicting wire in GUI for pips, fixes #225 2019-02-07 17:25:14 +01:00
David Shah
564a7e27b1 timing: Add --ignore-loops option 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-05 08:20:05 +01:00
David Shah
8e8c103b34 router1: Print route time 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-01-30 17:50:49 +00:00
David Shah
0ca0af6c72 placer1: Add place time print 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-01-30 17:50:49 +00:00
Eddie Hung
6d664046d3
Merge pull request #220 from YosysHQ/coi3 
ice40: Add budget override for CO->I3 path
 2019-01-29 11:22:31 -08:00
Eddie Hung
77bb5ea63a [ice40] Refactor Arch::getBudgetOverride() 2019-01-29 10:43:14 -08:00
David Shah
6cc1bfcb37
Merge pull request #217 from YosysHQ/timingfixes 
[timing] Path related fixes
 2019-01-27 17:13:46 +00:00
David Shah
cc53c312de timing: Path related fixes 
Signed-off-by: David Shah <dave@ds0.me>
 2019-01-27 16:45:37 +00:00
David Shah
b8bff6b8b5
Merge pull request #210 from twam/master 
Search for trellis in /usr/local/share/trellis if not specified with …
 2019-01-27 14:56:42 +00:00
David Shah
f4d8a25fb7 ice40: Add budget override for CO->I3 path 
Signed-off-by: David Shah <dave@ds0.me>
 2019-01-27 14:43:10 +00:00
Miodrag Milanovic
dbaae51159 Make cross compile possible for mingw 2019-01-27 10:10:37 +01:00
David Shah
265fa1be16
Merge pull request #211 from smunaut/ice40_ram_attrs 
ice40/pack: Copy attributes to packed cell
 2019-01-21 11:10:38 +00:00
David Shah
00c0ce81ff
Merge pull request #213 from smunaut/ice40_gbuf_errmsg 
ice40: Add error message if a selected site is not Global Buffer capable
 2019-01-21 11:10:11 +00:00
Sylvain Munaut
b274a8f8f0 ice40/pack: Copy attributes to packed RAM cells 
Useful to allow manual placement of SPRAM/EBR using BEL attribute
for instance

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2019-01-19 15:49:21 +01:00
Sylvain Munaut
830d462f92 ice40: Add error message if a selected site is not Global Buffer capable 
... rather than assert()-out during the call to getWireBelPins() call

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2019-01-18 17:53:24 +01:00
Tobias Müller
95ed84fd91 Search for trellis in /usr/local/share/trellis if not specified with -DTRELLIS_ROOT 2019-01-13 17:15:28 +01:00
David Shah
c1d15c749c
Merge pull request #205 from YosysHQ/ice40_io_tmg 
ice40: Add timing data for all IO modes
 2019-01-08 10:21:10 +00:00
David Shah
7d8b729ff4 ice40: Add timing data for all IO modes 
Signed-off-by: David Shah <dave@ds0.me>
 2019-01-07 17:18:40 +00:00
David Shah
747380537f ecp5: Add PULLMODE support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-01-07 14:27:58 +00:00
David Shah
67d2dcb0a8
Merge pull request #197 from YosysHQ/fix_192 
command: Setup logging before attempting to create Context
 2019-01-01 16:39:17 +01:00
David Shah
eb456ef476
Merge pull request #196 from YosysHQ/pio_error 
ice40: Improve handling of unconstrained IO
 2018-12-26 16:27:29 +00:00
David Shah
7f69c0f455 command: Setup logging before attempting to create Context 
This way errors (such as an invalid package type) occurring
during Context creation are printed properly.

Signed-off-by: David Shah <dave@ds0.me>
 2018-12-26 16:05:12 +00:00
David Shah
4444a39fd4 ice40: Improve handling of unconstrained IO 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-26 16:00:19 +00:00
David Shah
6c01f9b4ac
Merge pull request #195 from YosysHQ/fix_194 
ecp5: Check for incorrect use of TRELLIS_IO 'B' pin
 2018-12-25 21:01:01 +00:00
David Shah
1661350d25 ecp5: Check for incorrect use of TRELLIS_IO 'B' pin 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-25 19:45:10 +00:00
David Shah
e76479f379 ecp5: Fix tristate IO insertion 
Fixes #191

Signed-off-by: David Shah <davey1576@gmail.com>
 2018-12-22 10:11:18 +00:00
David Shah
8f5d5003e9 Clarify ICEBOX_ROOT parameter 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-12-21 14:37:27 +00:00
Adrian Jeakins
7f950a1852 Reduce GL shader version for wider compatibility. 2018-12-20 22:28:53 +00:00
Adrian Jeakins
3cdd83a3be Remove format versioning now this is set at the top level application. 2018-12-20 22:21:10 +00:00
David Shah
b22e524dac
Merge pull request #189 from YosysHQ/pcf_improve 
ice40: Add PCF support for -pullup, -pullup_resistor and -nowarn
 2018-12-20 21:21:53 +00:00
David Shah
953a3ac552 ice40: Add PCF support for -pullup, -pullup_resistor and -nowarn 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-12-20 20:52:54 +00:00
David Shah
580f6fbd21
Merge pull request #187 from YosysHQ/fix_lock_passthru 
ice40: Fix LOCK feedthrough insertion with carry or >8 LUTs
 2018-12-20 19:16:11 +00:00
David Shah
75335d4e1a ice40: Fix LOCK feedthrough insertion with carry or >8 LUTs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-12-20 18:50:34 +00:00