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109 Commits

Author SHA1 Message Date
Clifford Wolf
164bd28348 Add iCE40 Pip gfx 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-15 20:29:32 +02:00
Clifford Wolf
44663fa589 Fix ice40 gfx wire indices 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-13 15:44:39 +02:00
Clifford Wolf
b8a42ff53b Updates from clang-format 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-12 22:04:13 +02:00
Clifford Wolf
ad60ab2ef1 Fix ice40 wire segments in lutff complex 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-12 21:46:16 +02:00
Clifford Wolf
4f87ea0eb6 Improve iCE40 wire database and gfx 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-12 21:05:09 +02:00
Clifford Wolf
6ffae27aa1 Deterministic chipdb blobs 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-11 18:36:15 +02:00
Miodrag Milanovic
fd3c124f87 Add opetion to defie ICEBOX_ROOT, fix compile on other location 2018-07-03 20:46:05 +02:00
Miodrag Milanovic
ec9a9de6d3 Make chibdb.py able to generate pure binary output 2018-07-03 20:14:49 +02:00
David Shah
6a783ef94f Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-22 18:35:18 +02:00
David Shah
60e885d342 ice40: Adding extra cell wires to database; SB_WARMBOOT working 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-22 18:35:08 +02:00
Serge Bazanski
5dfe1969af Merge branch 'q3k/gl' into 'master' 
Modern OpenGL renderer

See merge request SymbioticEDA/nextpnr!1
 2018-06-22 16:17:21 +00:00
David Shah
7c169c48d0 ice40: Preparations for extra cells support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-22 17:44:26 +02:00
Sergiusz Bazanski
15a7a76415 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/gl 2018-06-22 15:54:05 +01:00
David Shah
cf78f1b0e4 ice40: Add UltraPlus tiles to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-22 16:40:22 +02:00
Sergiusz Bazanski
4e480a9a61 chipdb.py style fix 2018-06-20 20:28:48 +01:00
Clifford Wolf
9475997a2d Improve --tmfuzz mode and iCE40 delay estimator 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-20 19:22:03 +02:00
David Shah
d5a032d00e Fix chipdb UltraPlus wires 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-20 13:10:40 +02:00
Clifford Wolf
c3837027b2 Add better iCE40 delay estimates 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-20 12:50:38 +02:00
Clifford Wolf
acfef6971e Refactore ice40 chipdb to use a super-large C-string as output format 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 18:15:41 +02:00
Clifford Wolf
0af9156d7a Minor chipdb.py improvement 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 16:28:05 +02:00
Clifford Wolf
19b665177e Move top-level ChipInfoPOD into ice40 chipdb blob 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 16:12:52 +02:00
Clifford Wolf
6f4af8387e Move PackageInfoPOD to ice40 chipdb blob 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 15:53:17 +02:00
Clifford Wolf
5d46ff54ba Move TileType array to ice40 chipdb blob 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 15:46:39 +02:00
Clifford Wolf
f38c5660cb Move BitstreamInfoPOD to ice40 chipdb blob 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 15:39:19 +02:00
Clifford Wolf
a4ad3533fe Move IerenInfoPOD to ice40 chipdb blob 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 15:25:58 +02:00
Clifford Wolf
246fe999dd Move TileInfoPOD to chipdb blob 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 15:15:49 +02:00
Clifford Wolf
1f9c28ba58 Move SwitchInfoPOD to chipdb blob 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 15:05:17 +02:00
Clifford Wolf
a3e0842299 Move PipInfoPOD into ChipDB binary blob 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 14:46:10 +02:00
Clifford Wolf
3b5c33d685 Move WireInfoPOD into ChipDB binary blob 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 14:30:26 +02:00
Clifford Wolf
84defd3fee Minor refactoring of BinaryBlobAssembler, fix alignments 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-17 13:32:38 +02:00
Clifford Wolf
69e5bc5030 Progress with chipdb refactoring 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-16 19:25:37 +02:00
Clifford Wolf
ee06db3293 Progress with chipdb refactoring 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-16 18:42:29 +02:00
Clifford Wolf
f0edb625e3 Progress with chipdb refactoring 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-16 17:53:09 +02:00
Clifford Wolf
6acf23cf37 Some refactoring of Chip API (prep for chipdb refactoring) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-16 15:23:04 +02:00
Clifford Wolf
c94b8c4861 Drastically reduce number of linker symbols in chipdb 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 23:55:18 +02:00
Clifford Wolf
33863fee2d Add missing iCE40 global buffer bels 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 17:19:36 +02:00
Clifford Wolf
d80e60cce2 Add hierarchy to bel/wire/pip names 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 14:53:44 +02:00
David Shah
4694c6aae7 ice40: Update examples to use packer/pcf 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 12:55:08 +02:00
David Shah
696aaee24c ice40: Add package pins to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 11:40:28 +02:00
Clifford Wolf
391d49c13e Add nextpnr namespace 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 14:24:59 +02:00
Clifford Wolf
be73894bea Add "nextpnr.h" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 20:12:57 +02:00
David Shah
d3f1112580 Improving 5k support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 17:20:29 +02:00
Clifford Wolf
458a13456a Fix iCE40 routing graph 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 17:08:14 +02:00
Clifford Wolf
602e6fab1e Add support for iCE40 global buffers (currently only for 1k devices) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 16:31:06 +02:00
David Shah
02b83d6db6 Debugging on icebreaker 2018-06-10 15:06:26 +02:00
Clifford Wolf
4a79e70470 Fix ice40 pip/switch locked performance issue 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 14:08:00 +02:00
David Shah
30e672313d ice40: Add IO config to bitstream 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 13:24:48 +02:00
David Shah
89d5280bf6 ice40: Adding non-routing config bits to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 11:14:50 +02:00
David Shah
48b72126c9 ice40: Add switch data to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 10:54:55 +02:00
Clifford Wolf
70f322ab44 Renamed LOC attribute to BEL, fix ice40 IO bel names 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 19:52:22 +02:00
Clifford Wolf
8cabb39d6d Getting rid of .nil() methods, compare with zero- and default-constructed objects instead 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 18:41:38 +02:00
Clifford Wolf
dfbfbf87db Add very basic router 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 18:19:20 +02:00
Clifford Wolf
72b4bba0e7 Add ice40 geometry information 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-06 16:42:42 +02:00
Clifford Wolf
5ff9aafb20 Refactor Chip API and iCE40 database 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-06 15:13:41 +02:00
Clifford Wolf
d13a84b687 Add iCE40 blockram bels 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-04 12:37:56 +02:00
Clifford Wolf
6840ffd9c0 Add iCE40 SB_IO bels 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-03 16:16:59 +02:00
Clifford Wolf
20d7cd0194 Add ice40 ICESTORM_LC bels 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-02 15:00:33 +02:00
Clifford Wolf
757786f134 Progress in ice40 chipdb 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-26 14:56:30 +02:00
Clifford Wolf
1899833b4d Start work on iCE40 chipdb 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-26 14:27:28 +02:00