Commit Graph

4836 Commits

Author SHA1 Message Date
Miodrag Milanovic
3b1b549aa3 Add forgotten virtual port renames 2025-01-14 17:01:10 +01:00
Miodrag Milanovic
1eac0528ab Few more DFF features 2025-01-14 16:45:48 +01:00
Miodrag Milanovic
3e6e0273dd Simplify inversion of special signals 2025-01-14 15:17:18 +01:00
Miodrag Milanovic
ea6cbf9804 Create reproducible chip database 2025-01-14 15:16:19 +01:00
Miodrag Milanovic
cb1f01f3a6 Some CC_DFF improvements 2025-01-14 14:21:50 +01:00
Lofty
7d84aefb7f debug print if route found with wrong polarity 2025-01-13 16:20:06 +00:00
Miodrag Milanovic
fdb2dd4c42 BUFG support 2025-01-13 13:16:58 +01:00
Miodrag Milanovic
2a41124378 Fix script 2025-01-10 09:16:23 +01:00
Miodrag Milanovic
e6450a179b Added MX2 and MX4 support 2025-01-09 14:27:21 +01:00
Miodrag Milanovic
94071078dc Add clock inversion pip 2025-01-08 15:02:56 +01:00
Lofty
005bffab48 Constrain routes to have correct inversion state 2025-01-08 13:46:02 +00:00
Miodrag Milanovic
1fc8809e18 Add CPE input inverters 2025-01-08 14:08:41 +01:00
Miodrag Milanovic
91a88dda77 Fix CC_L2T5 pack 2025-01-08 14:07:46 +01:00
Miodrag Milanovic
0987d5a2b9 Start work on BUFG support 2025-01-06 14:15:05 +01:00
Miodrag Milanovic
ed6f6a4d98 Use pin connection aliases 2025-01-03 15:06:52 +01:00
Miodrag Milanovic
5fb63c6a0c Update due to API changes 2024-12-27 14:34:12 +01:00
Miodrag Milanovic
6cc8c2ee54 Use device wrapper class 2024-12-27 10:04:18 +01:00
Miodrag Milanovic
f92728b826 Cleanup 2024-12-26 09:34:24 +01:00
Miodrag Milanovic
150428fe7b Prevent pass trough issues 2024-12-25 16:39:01 +01:00
Miodrag Milanovic
5f85167f8c Fix DFF pack 2024-12-25 15:48:09 +01:00
Miodrag Milanovic
4badd8bbbf Handle MUX flags 2024-12-25 14:36:33 +01:00
Miodrag Milanovic
d41f13bde9 pack DFF fixes 2024-12-25 08:54:54 +01:00
Miodrag Milanovic
63beb45950 Naive pack CC_DFF 2024-12-24 09:29:48 +01:00
Miodrag Milanovic
d09c901f67 Naive lut tree CPE pack 2024-12-23 09:37:23 +01:00
Miodrag Milanovic
cb990e3731 Keep just used connections for now 2024-12-21 12:24:26 +01:00
Miodrag Milanovic
f027bc3cf9 Cleanup 2024-12-21 12:15:03 +01:00
Miodrag Milanovic
81a1f02dcc Add LVDS support 2024-12-20 19:53:29 +01:00
Miodrag Milanovic
ab29eab513 More parameter checks 2024-12-20 13:48:02 +01:00
Miodrag Milanovic
b020a47bb8 Cleanup 2024-12-20 12:03:53 +01:00
Miodrag Milanovic
2f537d2ccc Fixed typo 2024-12-20 11:09:12 +01:00
Miodrag Milanovic
86d93849c8 Add IN1->RAM_O2 propagation 2024-12-20 11:03:10 +01:00
Miodrag Milanovic
757ed10047 GPIO initial work 2024-12-20 09:38:14 +01:00
Miodrag Milanovic
2b038faeb1 Fix script 2024-12-18 11:46:38 +01:00
Miodrag Milanovic
de2d551035 Start adding infrastructure for reading bitstream 2024-12-18 10:44:25 +01:00
Miodrag Milanovic
7f98c33d6b Add support for reading from config 2024-12-18 10:30:14 +01:00
Miodrag Milanovic
19f5d24b79 Restructure code 2024-12-18 08:56:54 +01:00
Miodrag Milanovic
503fafd574 Propagate errors 2024-12-17 10:52:19 +01:00
Miodrag Milanovic
8436191307 Use CCF to set IO location 2024-12-16 19:21:32 +01:00
Miodrag Milanovic
0add621416 Add CCF parsing 2024-12-16 16:58:46 +01:00
Miodrag Milanovic
4d46e57d12 Initial work on forming bitstream 2024-12-16 11:19:56 +01:00
Miodrag Milanovic
6cf832e9b0 Initial code for GateMate 2024-12-10 15:48:07 +01:00
Miodrag Milanović
d810aac867
Add GroupId related calls to Himbaechel API (#1399)
* Add GroupId related calls to Himbaechel API

* Example uarch using new API features

* Update drawGroup to propagate only GroupId
2024-12-05 13:59:33 +01:00
Miodrag Milanović
5a807110de
Adding NanoXplore NG-Ultra support (#1397)
* ng-ultra: new architecture

* Implementation as in D2 deliverable

* Support for nxdesignsuite-24.0.0.0-20240429T102300

* Save memory by directly outputing json

* Add support for bidirectional IOs

* cleanup

* Create BFRs properly

* Add IOM insertion

* Cleanup

* Block certain pips depending of DDFR mode

* Add LUT bypass to improve routability

* Add bypass for CSC mode of GCK

* Fix IOM case

* Initial memory support

* Better RF/XRF handling

* fix

* RF placement and legalization

* Disconnect non available ports for NX_RAM

* cleanup

* Add RFB/RAM context support for latest release

* Remove ports that must not be used

* Proper port used only on RFB

* Add structure for clock sinks

* Use cell type where applicable

* Add clock sinks for other cell types

* Validation check fixes

* Commented too restrictive placement

* Added more crossbar wire type

* Hande IO termination input

* Fail early due to NX tools limitation for now

* Validations and fixes for RAM I/Os

* Fix for latest version of tools

* Use ctx->idf where applicable

* warn if RAM ports are not actually used

* Fix IOM packing

* Fix CY packing

* Change how constants are handled on CY

* Post placement optimization for CY

* Address comments for PR

* pack and export  GCK, WFG and PLL

* Cover more global routing cases

* Constraing to location if provided

* Place at LOC

* Pack and export DSP

* wip

* wip

* notes

* wip

* wip

* Validate DSPs

* DSP cascading

* Check mandatory parameters for DSP

* existing gck

* wip

* export all the rest for bitstream

* CDC packing

* add more sinks

* place FIFO

* map rest of FIFO ports

* enable pll by default

* cleanup

* Initial XLUT support

* Fix statistics

* Properly duplicate GCKs

* RRSTO and WRSTO are not used on XFIFO

* Fix for latest version of JSON format

* Implement GCK limitations

* cleanup

* cleanup

* Add more signals and use lowskew name

* cleanup code a bit

* Fix wfb

* detect cascaded GCKs

* Handle DFR

* Route dfr clock properly

* Cleanup

* Cleanup bitstream code

* Review issues addressed

* Move helper routines

* Expose private members for unit tests

* cleanup

* remove scale factor

* make all location helper arrays static

* Addressed review comments

* Support post-routing CSC and SCC

* Support NX_BFF

* Place CSS and SCC only on allowed locations

* Support latest Impulse

* ng_ultra: Expand bounding box further for left-edge IO

Signed-off-by: gatecat <gatecat@ds0.me>

* Export all IO parameters in bitstream

* Handle new CSV order or parameters and additional validation

* Add some more undocumented values for CSV

* Support for old and new CSV formats

* Initial DDFR support

* Display warning message once per file

* Address review issues

* Fix crash on memory access

* Make boundbox fit NG-Ultra internal design

* Update attributes after dff rewrite

* Implement basic NG-Ultra LUT-DFF unit tests

* Always use first seen xbar input

Signed-off-by: gatecat <gatecat@ds0.me>

* Simplified crossbar pip detection

* Change order to prevent issues with some unconnected constants

* Pack LUT and multiple DFF in stripe

* Place DFF chains

* Improve large DFF chains

* Rename to pack_dff_chains

* Better use XLUTs when possible

* pack output DFF together with XLUT

* option to disable XLUT optimiziations

* Make more optimizations optional

* fix to use pre-increment

* GCK for lowskew signals

* Bugfix for nets that are not part of lowskew network

* Fix bitstream export for PLL cell

* Remove separate route lowskew

* Allow WFG mode 2

* Merge inverter into GCK

* Add CSC per TILE when needed

* Improve reusage of existing cell for CSC

* Take preferred CSC

* Cleanup

* When in place CSC size not important

* Cleanup

* Reset and Load restriction

* make csc optimisation optional

* Proper count for IO resources

* Detect when there is no next cell for DSP chain

* Do not incorporate loops in XLUT

* Check if output exists

* Update copyright for delivery

* Make building NG-Ultra chip database optional, follow filename convention

* Ported drawing code to new API

* Update expandBoundingBox for NG-Ultra

* Copyright and license update

* Add README information

* cleanup and constids

* Using ctx->idf where applicable

* remove if_using_basecluster

* refactor extra data usage

* refactor to use create_cell_ptr only

* optimized getCSC

* optimize critical path a bit

* clangformat

* disable clangformat where applicable

---------

Signed-off-by: gatecat <gatecat@ds0.me>
Co-authored-by: Lofty <dan.ravensloft@gmail.com>
Co-authored-by: gatecat <gatecat@ds0.me>
2024-12-04 09:00:05 +01:00
YRabbit
5eaa1b3f1f
Gowin. Add IODELAY. (#1398)
* Gowin. Add IODELAY.

Input/Output delay (IODELAY) is programmable delay uint in IO block.

This delay line is enabled before/after the IO pad and allows the signal
to be delayed statically or dynamically during 0-127 stages each lasting
from 18 to 30 picoseconds depending on the chip family.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>

* Gowin. Replacing assertions with log_error.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>

---------

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-11-30 09:24:59 +01:00
YRabbit
2b8a235776
Gowin. Add Input Edge Monitor (#1396)
Add sampling part to IO blocks (input only). This edge detector will
allow to dynamically adjust DDR decoding window in the future.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-11-27 09:57:34 +01:00
Miodrag Milanović
0e69425794
Add expandBoundingBox method to API (#1395)
* Add expandBoundingBox method to API

* Update API documentation
2024-11-26 10:13:41 +01:00
Miodrag Milanović
55035465aa
Himbaechel GUI (#1295)
* Extend Himbaechel API with gfx drawing methods

* Add bel drawing in example uarch

* changed API and added tile wire id in db

* extend API so we can distinguish CLK wires

* added bit more wires

* less horrid way of handling gfx ids

* loop wire range

* removed not needed brackets

* bump database version to 5

* Removed not used GfxFlags
2024-11-21 15:13:22 +01:00
YRabbit
9c2d96f86e
Gowin. FFs placement. (#1386)
* Gowin. FFs placement.

* Allow clusters to be created from FFs and LUTs;

* Immediately create pass-through LUTs from free LUTs adjacent to FF - at the same time ensure alternating use of LUT inputs;

* In case of constant networks, such pass-through LUTs are disconnected from networks altogether;

* Allow FF to be placed directly into SSRAM slides - this is useful when using synchronous reading.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>

* Gowin. Fix aux name creation

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>

* Gowin. Use I3 for pass-trough LUTs

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>

---------

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-10-22 12:49:44 +02:00
myrtle
f36a6571c1
cmake: Use upstream BoostConfig.cmake instead of cmake's own (#1387)
Signed-off-by: gatecat <gatecat@ds0.me>
2024-10-22 10:35:54 +02:00
Meinhard Kissich
cf42baa43b
Fix RNG seed initialization (#1383) 2024-10-09 18:25:02 +02:00