Clifford Wolf
|
3b5c33d685
|
Move WireInfoPOD into ChipDB binary blob
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-17 14:30:26 +02:00 |
|
Clifford Wolf
|
84defd3fee
|
Minor refactoring of BinaryBlobAssembler, fix alignments
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-17 13:32:38 +02:00 |
|
Clifford Wolf
|
69e5bc5030
|
Progress with chipdb refactoring
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-16 19:25:37 +02:00 |
|
Clifford Wolf
|
ee06db3293
|
Progress with chipdb refactoring
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-16 18:42:29 +02:00 |
|
Clifford Wolf
|
f0edb625e3
|
Progress with chipdb refactoring
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-16 17:53:09 +02:00 |
|
Clifford Wolf
|
fe47e7fc2d
|
Update clangformat
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-16 15:25:33 +02:00 |
|
Clifford Wolf
|
4d14bc2914
|
Merge remote-tracking branch 'origin/master' into chipdbng
|
2018-06-16 15:25:03 +02:00 |
|
Clifford Wolf
|
6acf23cf37
|
Some refactoring of Chip API (prep for chipdb refactoring)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-16 15:23:04 +02:00 |
|
David Shah
|
7ff1b7e02f
|
ice40: Fix RAM config in packer
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-16 14:44:10 +02:00 |
|
David Shah
|
f079e0d204
|
ice40: Fix BRAM initialisation
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-16 14:44:10 +02:00 |
|
David Shah
|
c0a2627179
|
place: Tidying up the SA placer
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-16 14:44:10 +02:00 |
|
David Shah
|
c9a784ec0c
|
ice40: Include RAM init data in bitstream
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-16 14:44:10 +02:00 |
|
David Shah
|
04f1d7516a
|
ice40: Fix bitstream generation when parameters are unspecified
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-16 14:44:10 +02:00 |
|
David Shah
|
23b1fc02fb
|
ice40: Bitstream generation for RAM
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-16 14:44:10 +02:00 |
|
David Shah
|
cabdfe3616
|
ice40: Only place IO at valid pins
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-16 14:44:10 +02:00 |
|
David Shah
|
6b74d326d4
|
experiment: Simple heuristic-based placer
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-16 14:44:10 +02:00 |
|
David Shah
|
355d33632c
|
ice40: Another arch_place fix
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-14 21:52:01 +02:00 |
|
David Shah
|
66ea22bb5c
|
ice40: General fixes
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-14 21:12:15 +02:00 |
|
David Shah
|
323a2aaa54
|
ice40: Read cells in arachne placement script
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-14 20:55:39 +02:00 |
|
David Shah
|
0f0d9bfb00
|
ice40: Importer for placed ice40 designs from arachne
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-14 20:46:05 +02:00 |
|
Clifford Wolf
|
312699e590
|
Add route-ripup routing loop
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-14 15:09:13 +02:00 |
|
Clifford Wolf
|
7787ce5fd9
|
Refactor position/delay estimation API
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-14 12:43:00 +02:00 |
|
Clifford Wolf
|
c94b8c4861
|
Drastically reduce number of linker symbols in chipdb
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-13 23:55:18 +02:00 |
|
David Shah
|
537b0e6e94
|
ice40: Rename ICESTORM_RAM pins
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-13 18:18:57 +02:00 |
|
Clifford Wolf
|
1a3d0f2f5d
|
Add picorv32_top module with fewer IO pins
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-13 17:38:34 +02:00 |
|
Clifford Wolf
|
33863fee2d
|
Add missing iCE40 global buffer bels
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-13 17:19:36 +02:00 |
|
Clifford Wolf
|
821fb3a55d
|
Add test PicoRV32 build script
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-13 17:08:27 +02:00 |
|
Clifford Wolf
|
81a154ca5d
|
Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr
|
2018-06-13 16:54:25 +02:00 |
|
Clifford Wolf
|
aa4fedfd54
|
Add A*-like optimizations to router
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-13 16:52:21 +02:00 |
|
David Shah
|
5af707a0b6
|
ice40: Pack RAMs
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-13 16:26:21 +02:00 |
|
David Shah
|
14b5e46b5d
|
ice40: Promote one clock to a global buffer
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-13 15:10:42 +02:00 |
|
Clifford Wolf
|
d80e60cce2
|
Add hierarchy to bel/wire/pip names
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-13 14:53:44 +02:00 |
|
David Shah
|
9374ef29bf
|
Fixing implementation of constants
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-13 14:01:42 +02:00 |
|
David Shah
|
4694c6aae7
|
ice40: Update examples to use packer/pcf
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-13 12:55:08 +02:00 |
|
Clifford Wolf
|
1e314cc0ce
|
Update chip Graphics API
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-13 12:48:58 +02:00 |
|
Clifford Wolf
|
145c849596
|
Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr
|
2018-06-13 12:38:28 +02:00 |
|
Clifford Wolf
|
4d7f18dd98
|
Redesign PosInfo API
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-13 12:37:23 +02:00 |
|
David Shah
|
de0918c287
|
ice40: Add a PCF parser
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-13 12:30:15 +02:00 |
|
David Shah
|
5435a97024
|
ice40: Add package selection
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-13 11:51:09 +02:00 |
|
David Shah
|
696aaee24c
|
ice40: Add package pins to database
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-13 11:40:28 +02:00 |
|
David Shah
|
94eea289ae
|
Simple IO buffer insertion, enable packer by default
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-13 11:08:20 +02:00 |
|
David Shah
|
a76f5c5678
|
Remove IO buffers when fed by SB_IO
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-13 10:50:05 +02:00 |
|
Miodrag Milanovic
|
b7c747f15b
|
Write tests to replace -test option from main
|
2018-06-12 20:39:20 +02:00 |
|
Miodrag Milanovic
|
9953012154
|
reveresed logic for enabling main file, and made tests link arch files
|
2018-06-12 19:56:03 +02:00 |
|
Clifford Wolf
|
136ce3d18f
|
Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr
|
2018-06-12 15:51:51 +02:00 |
|
Clifford Wolf
|
9c275d0a65
|
Add fast IdString <-> PortPin conversion
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-12 15:50:33 +02:00 |
|
David Shah
|
6e79b93c6e
|
Improve packer diagnostics
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-12 15:33:53 +02:00 |
|
David Shah
|
6707b985b4
|
ice40: Add support for LC placement constraints in packer
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-06-12 15:13:50 +02:00 |
|
Clifford Wolf
|
a139654980
|
Add IdString API
Signed-off-by: Clifford Wolf <clifford@clifford.at>
|
2018-06-12 15:08:01 +02:00 |
|
David Shah
|
592a627e0c
|
Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr
|
2018-06-12 14:43:56 +02:00 |
|