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3,875 Commits 22 Branches 7 Tags 17 MiB
3b99db294f
Commit Graph

71 Commits

Author SHA1 Message Date
gatecat
3b99db294f
Merge pull request #848 from galibert/master 
mistral: Support the new routes-to-bin intermediate tool generation
 2021-10-17 19:02:25 +01:00
Olivier Galibert
f88c119461 mistral: Add internal oscillator support 2021-10-17 14:26:24 +02:00
Olivier Galibert
60833abd3b mistral: Support the new routes-to-bin intermediate tool generation 2021-10-17 11:26:06 +02:00
Olivier Galibert
bfd61411e7 cyclonev_hps_interface_mpu_general_purpose: Use a id_ identifier 2021-10-15 12:05:24 +02:00
Olivier Galibert
206bb07506 mistral: Add support for cyclonev_hps_interface_mpu_general_purpose 2021-10-14 17:04:32 +02:00
gatecat
15c10796bd mistral: Fix MLAB clustering 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-10-11 20:12:56 +01:00
gatecat
dd2c5942a4 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-10-11 19:35:23 +01:00
gatecat
349cbdf9da
Merge pull request #843 from Ravenslofty/lofty/mistral-basic-timing 
mistral: very basic timing info
 2021-10-11 14:35:28 +01:00
Lofty
0a0c9393c1 mistral: very basic timing info 2021-10-10 23:56:58 +01:00
Lofty
4c8a8003d3 mistral: clean up bel init slightly 2021-10-08 15:21:21 +01:00
gatecat
f5f7ef6864 mistral: Adding support for MLABs as memory 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-10-05 12:40:47 +01:00
gatecat
fe31fba623 mistral: Add bel pins for MLAB write port 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-10-03 15:18:41 +01:00
gatecat
0e83db47a0 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-08-26 14:58:43 +01:00
gatecat
0367719eea mistral: Permute MLAB init bits correctly 2021-08-24 15:39:45 +01:00
Lofty
b88e86f366 mistral: Use MLABs as if they're LABs (for now) 
Signed-off-by: Lofty <dan.ravensloft@gmail.com>
 2021-08-17 16:02:49 +01:00
gatecat
f7be385230 mistral: Include mistral generated files in include dirs 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-08-15 15:13:31 +01:00
gatecat
e7db15d6a4 mistral: Fix pip binding check 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-08-14 20:23:05 +01:00
gatecat
2ffb081442 Fixing old emails and names in copyrights 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-12 13:22:38 +01:00
gatecat
6fbc9e8159 mistral: Remove mistral root argument 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-04 19:25:34 +01:00
gatecat
47f24a7024 mistral: Build libmistral as a cmake subdir 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-04 19:25:18 +01:00
gatecat
dcbb322447 Remove redundant code after hashlib move 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-02 15:05:20 +01:00
gatecat
eca1a4cee4 Use hashlib in most remaining code 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-02 15:05:20 +01:00
gatecat
ecc19c2c08 Using hashlib in arches 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-02 15:05:19 +01:00
gatecat
579b98c596 Use hashlib for core netlist structures 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-02 14:27:56 +01:00
gatecat
ff72454f83 Add hash() member functions 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-02 14:27:56 +01:00
gatecat
cbedf52342 mistral: Fix nextpnr build with LLVM 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-02 10:44:03 +01:00
gatecat
eb2265a2bf mistral: Make RBF compression optional 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-30 15:50:12 +01:00
Lofty
b81ba2d6c2 mistral: add getChipName 
Signed-off-by: Lofty <dan.ravensloft@gmail.com>
 2021-05-15 22:50:56 +01:00
gatecat
9d7f90dd89 mistral: Add MISTRAL_CLKBUF cell type 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 21:28:48 +01:00
gatecat
3bb94192d5 mistral: Tidying up 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
b1e1492dac mistral: Make router2 the default 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
7fbfd98b8a mistral: Speed up bel binding and checking 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
34677d3883 mistral: Workaround for weird SCLR issue 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
9221acc9e2 mistral: Fix ENA and ACLR bitstream generation 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
4d32c4f2fc mistral: Disable global buffers that are currently broken 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
e1aaf715c6 mistral: Compensate for EF_SEL mirroring in validity check 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
87ebada258 mistral: Fix EF_SEL and BTO_DIS 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
8bc9732d49 mistral: PKREG bits appear to be mirrored within a half? 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
757a10c247 mistral: Debugging flipflops 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
dce847b2f3 mistral: Trim SDATA if SLOAD is low 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
b29fa1d24c mistral: FF&CLKBUF fixes, part 1 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
66b3a192f8 mistral: First pass at FF and CLKBUF bitgen 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
b2f45b1aab mistral: Account for TD input count limit 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
bd525d3548 msitral: Fix pip iterator Python bindings 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
8c7fa8e6c9 mistral: Implement PIP locations, too 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
6ad329c540 mistral: Implement bounding boxes for router2 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
e688ee0e89 mistral: Debugging carry chain issues 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
3313d5267a mistral: Adding FF control set reservation 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
09a867310b mistral: Carry fixes 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00
gatecat
3d1bb4f1b2 mistral: Carry debugging 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 14:54:33 +01:00