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433ad6462e
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570 Commits

Author SHA1 Message Date
David Shah
433ad6462e Arch API: Removing Arch::isIOCell 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 17:06:59 +02:00
David Shah
e6eb203868 ice40: Add timing arcs through global buffers 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 16:34:41 +02:00
David Shah
d173ddba36 timing: Debugging implementation of new timing API 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 15:15:21 +02:00
David Shah
787fe5661c ice40: Timing arch fix 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 15:00:39 +02:00
David Shah
d8b3830031 timing: Update to new use API (currently broken) 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 14:58:43 +02:00
David Shah
bf42e525cb Arch API: New specification for timing port classes 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 14:37:59 +02:00
Eddie Hung
f44a5fb904 clangformat 2018-08-06 17:35:23 -07:00
Eddie Hung
1b9a664bb1 Merge branch 'master' into assign_budget_speedup 2018-08-06 12:30:24 -07:00
Eddie Hung
9addcac09c ice40's getBudgetOverride() to return correct delay for different devices 2018-08-06 12:22:13 -07:00
Eddie Hung
21cd1d7dd6 Add new Arch::isIOCell() API function 2018-08-06 12:11:47 -07:00
Eddie Hung
0f3459dbe5 Fix ice40's getBudgetOverride() to override only for COUT -> CIN 2018-08-06 08:22:08 -07:00
Eddie Hung
823ceaacbf Change getBudgetOverride() signature to return bool and modify budget in place 2018-08-06 07:56:28 -07:00
Eddie Hung
f048deb33d Restore initial assign_budget() call after pack(), restrict call after initial_placement to slack_redist 2018-08-05 22:55:58 -07:00
David Shah
1ce0b5add2 API change: Use CellInfo* and NetInfo* as cell/net handles (Python bindings) 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-05 16:21:13 +02:00
Clifford Wolf
5e53075990 API change: Use CellInfo* and NetInfo* as cell/net handles (common, ice40) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-05 15:25:42 +02:00
Clifford Wolf
287fe7e894 clangformat 2018-08-05 14:18:34 +02:00
Clifford Wolf
528eddcaf7 Fix bug in ice40 estimateDelay() 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 22:29:43 +02:00
Clifford Wolf
175da732ac Use faster model for ice40 predictDelay() 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 20:16:43 +02:00
Clifford Wolf
f6b3333a7d Add new iCE40 delay estimator and delay predictor 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 19:50:49 +02:00
David Shah
67347573c2 ice40: Bitstream gen for LUT permutation 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-04 18:23:48 +02:00
Clifford Wolf
31fe52581b Add generation of models to tmfuzz 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 16:54:12 +02:00
Clifford Wolf
bd36cc1275 Refactor ice40 timing fuzzer used to create delay estimates 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 13:41:42 +02:00
Clifford Wolf
700e68746a Fix bug in ice40 chipdby.py add_wire() that moves some wires to X0/Y0 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 13:33:24 +02:00
Clifford Wolf
086bc941a8 Remove SVG functionality from ice40 main 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 11:52:35 +02:00
Clifford Wolf
96291f17aa Merge branch 'master' of github.com:YosysHQ/nextpnr into lutperm 2018-08-04 10:32:07 +02:00
Eddie Hung
d66edf5223 Merge branch 'master' into slack_redist_freq 2018-08-03 23:43:53 -07:00
David Shah
65d73eb983
Merge pull request #23 from daveshah1/use_placeconstr 
Making use of relative constraints
 2018-08-04 08:32:42 +02:00
David Shah
affc6da1af ice40: Add SB_GB timing to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-04 08:28:13 +02:00
David Shah
082b8bf272 clangformat 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-04 08:18:04 +02:00
David Shah
176a23936c Tidy up 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-04 08:15:49 +02:00
Eddie Hung
3d5dcda12c Auto frequency only if --freq 0 is set 2018-08-03 19:53:32 -07:00
Clifford Wolf
8d372b86f3 Proper ice40 wire types 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-03 21:11:12 +02:00
David Shah
b937e6defe Add constraint weight as a command line option 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 18:31:54 +02:00
Clifford Wolf
2a1d54389f Add iCE40 pseudo-pips for lut permutation 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-03 17:37:59 +02:00
David Shah
fd2174149c Fixing constraint placement bugs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 16:29:44 +02:00
David Shah
8c518cb838 Fixing relative constraint implementation 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 15:40:01 +02:00
David Shah
7e9209878c Reworking packer and placer to use new generic rel legaliser 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 15:00:32 +02:00
David Shah
26c68c4bcc Remove old place legaliser, set placement constraints instead (currently ignored by placer) 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 13:18:48 +02:00
Clifford Wolf
80e6b17ec9
Merge pull request #21 from daveshah1/promote_logic_globals 
ice40: Promote 'logic' globals as well as clock/enable/reset
 2018-08-03 12:51:55 +02:00
Clifford Wolf
e673d9d2db
Merge pull request #22 from YosysHQ/routethru 
Add iCE40 LUT route-through pips
 2018-08-03 12:51:37 +02:00
David Shah
483f1b772c ice40: Promote 'logic' globals as well as clock/enable/reset 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 09:56:56 +02:00
David Shah
35bc80e130 ice40: Add bitstream gen for routethru LUTs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 09:26:37 +02:00
Miodrag Milanovic
a761b772c8 Make worker generic 2018-08-02 18:10:01 +02:00
Miodrag Milanović
e46209e734
Merge pull request #11 from mmicko/project_load 
preserve command line parameters for project load
 2018-08-02 08:24:49 -07:00
Clifford Wolf
36009645ce Add LUT route-through pips to iCE40 architecture database 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-02 16:28:47 +02:00
David Shah
a7269a685e ice40: Use real cell timings 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-02 16:02:51 +02:00
David Shah
c0aaac8dfa ice40: Adding cell timings to chipdb 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-02 15:20:43 +02:00
Clifford Wolf
6ccf8629b5 Add Router1Cfg 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-02 13:58:23 +02:00
Miodrag Milanovic
869a804ee1 preserve command line parameters for project load 2018-08-02 06:29:21 +02:00
Clifford Wolf
29dd98420b Remove getFrameDecal() API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-01 11:30:11 +02:00