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2,086 Commits 22 Branches 7 Tags 17 MiB
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Author SHA1 Message Date
David Shah
c0a2627179 place: Tidying up the SA placer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
c9a784ec0c ice40: Include RAM init data in bitstream 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
04f1d7516a ice40: Fix bitstream generation when parameters are unspecified 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
71903e29d4 place: Reformat placer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
23b1fc02fb ice40: Bitstream generation for RAM 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
cabdfe3616 ice40: Only place IO at valid pins 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
2479b4ecbf Improve placement heuristic 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
Clifford Wolf
579455d1b0 Fix router for routing to the same dest wire twice 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-16 14:44:10 +02:00
David Shah
432fe52274 Remove dead code 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
47566cf5e9 Improving SA placer performance 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
2d993d8ee9 Very slow SA placer based on arachne-pnr 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
Miodrag Milanovic
e7d6c4038d Create all without ui file, enables more control 2018-06-16 14:44:10 +02:00
Miodrag Milanovic
b569d76996 Propagate signals 2018-06-16 14:44:10 +02:00
David Shah
32dcf6b3fe Experimenting with more unplacing 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
104c2dad9b Adding randomness and changes metrics to placer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
828c96f80b Updating placer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
2f01ec5157 Update basic placer to use new API 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
3ef45d2a27 Another heuristic experiment 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
b1e08fa064 Playing about with placement heuristics 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
6b74d326d4 experiment: Simple heuristic-based placer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
Clifford Wolf
5d343a168b Fix router for routing to the same dest wire twice 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-15 20:56:40 +02:00
Miodrag Milanovic
3c6f1548d6 Create all without ui file, enables more control 2018-06-15 12:22:44 +02:00
Miodrag Milanovic
fe4d56a45a Propagate signals 2018-06-15 11:10:11 +02:00
David Shah
355d33632c ice40: Another arch_place fix 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-14 21:52:01 +02:00
David Shah
66ea22bb5c ice40: General fixes 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-14 21:12:15 +02:00
David Shah
323a2aaa54 ice40: Read cells in arachne placement script 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-14 20:55:39 +02:00
David Shah
0f0d9bfb00 ice40: Importer for placed ice40 designs from arachne 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-14 20:46:05 +02:00
Miodrag Milanovic
ff074e4b4c Added back some size limits for UI 2018-06-14 20:24:05 +02:00
Miodrag Milanovic
1336eb0630 Split design widget on side 2018-06-14 20:04:22 +02:00
Miodrag Milanovic
4a734d6cc7 separate clearProperties 2018-06-14 20:04:22 +02:00
Miodrag Milanovic
064dc13f3d Cleanup 2018-06-14 20:04:22 +02:00
Miodrag Milanovic
4e82ed46d2 Split to classes 2018-06-14 20:04:22 +02:00
Miodrag Milanovic
9c0640240f Split per widgets 2018-06-14 20:04:22 +02:00
Clifford Wolf
8c46cc2fce Add output of estimated total wire delay to router (as metric for placement quality) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-14 19:13:14 +02:00
Clifford Wolf
66ced800d7 Increase ripup penalties over time 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-14 15:45:47 +02:00
Clifford Wolf
312699e590 Add route-ripup routing loop 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-14 15:09:13 +02:00
Clifford Wolf
7787ce5fd9 Refactor position/delay estimation API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-14 12:43:00 +02:00
David Shah
b1cbae1293 python: Clear SIGINT handler after Python loads 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-14 10:08:54 +02:00
Clifford Wolf
c94b8c4861 Drastically reduce number of linker symbols in chipdb 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 23:55:18 +02:00
Miodrag Milanovic
342290d6bd Cleanup and preps for further ui work 2018-06-13 21:27:49 +02:00
Miodrag Milanovic
68c6239cdc Make custom types for elements in tree view 2018-06-13 20:57:27 +02:00
Clifford Wolf
9b3af68e44 Improve router error reporting 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 18:28:02 +02:00
David Shah
537b0e6e94 ice40: Rename ICESTORM_RAM pins 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 18:18:57 +02:00
Clifford Wolf
3d5954f997 Improve router error messages 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 18:10:09 +02:00
Clifford Wolf
794fc6df60 Add support for CellInfo->pins in router 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 17:52:18 +02:00
Clifford Wolf
1a3d0f2f5d Add picorv32_top module with fewer IO pins 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 17:38:34 +02:00
David Shah
16ee2a89a8 frontend/json: Fix bus ports 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 17:32:34 +02:00
Clifford Wolf
9eb4943bd5 Fix router error handling for unplaced cells 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 17:26:03 +02:00
Clifford Wolf
33863fee2d Add missing iCE40 global buffer bels 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 17:19:36 +02:00
Clifford Wolf
821fb3a55d Add test PicoRV32 build script 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 17:08:27 +02:00