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Author SHA1 Message Date
gatecat
535723f414 Start making use of getBelPinsForCellPin API 
This replaces getNetinfoSinkWire with 3 new functions for different use
cases.

At the moment all existing code has been moved to getNetinfoSinkWire
with phys_idx=0 so the build doesn't break; but this won't yet function
properly with more than one sink. But it provides a base on which to
work on refactoring the routers to support this case.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-10 14:18:12 +00:00
gatecat
85bb108ba4 Add getBelPinsForCellPin to Arch API 
This is a basic implementation, without considering "M of N"
arrangements (e.g. for LUT permuation where you only want to route to 1
out of 4/6 sinks) or using a type other than IdString to identify bel
pins.

But this is also enough to start working out where in nextpnr will break
due to removing the 1:1 cell:bel pin cardinality, as a next step.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-10 11:54:54 +00:00
gatecat
6bd3dba1e3 Remove the unused CellInfo::pins field 
No arches ever actually used this to implement a Cell->Bel pin mapping,
and in practice if any did try they would inevitably hit bitrot.

This field had limited use in practice as it is necessary to also
support cases where one cell pin maps to more than one bel pin. Removing
this old field is the first step towards developing a new API for this.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-10 10:42:26 +00:00
gatecat
f67d474edc
Merge pull request #573 from YosysHQ/gatecat/basearchranges 
Add BaseArchRanges for default ArchRanges types
 2021-02-09 11:30:23 +00:00
gatecat
11db5a2f1d Add BaseArchRanges for default ArchRanges types 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-09 10:39:14 +00:00
gatecat
1febb80a1e Add nextpnr-gowin binary to gitignore 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-09 10:36:03 +00:00
gatecat
bcf81f0e71
Merge pull request #568 from YosysHQ/dave/arch-override 
Create a new BaseArch that formally specifies the Arch API and provides some base implementations
 2021-02-08 17:56:08 +00:00
gatecat
2932dc3985 Make BaseCtx destructor virtual 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-08 17:03:22 +00:00
D. Shah
f501ba0c77 Update prjoxide URL 
Signed-off-by: D. Shah <gatecat@ds0.me>
 2021-02-08 13:04:49 +00:00
David Shah
23edefa0b5
Merge pull request #572 from YosysHQ/dave/more-ssize 
Use RelSlice::ssize instead of cast-to-int throughout
 2021-02-08 12:05:58 +00:00
D. Shah
0d444bfc6e Use RelSlice::ssize instead of cast-to-int throughout 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-08 11:24:00 +00:00
D. Shah
697c4fd08b Update docs with API changes 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-08 11:08:45 +00:00
D. Shah
9deb9e6e85 interchange: Base on ArchAPI 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-08 10:41:03 +00:00
D. Shah
efca63862c Use 'T' postfix to disambiguate LHS and RHS of using 
Arches might otherwise have range types named ambigiously with the entry
in ArchRanges.

Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-08 10:29:50 +00:00
D. Shah
3e631fe2f4 Add archArgs and archArgsToId to Arch API 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
6575bfac3e gowin: Switch to BaseArch 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
c7ef7e1902 generic: Base upon ArchAPI 
As generic is often picked as our 'odd-one-out' we also use it as an
example of an Arch that does not build upon BaseArch.

Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
f5d2e245e1 nexus: Switch to BaseArch 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
59c3db46ca ice40: Switch to BaseArch 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
a8a27299ae Add pure-virtual ArchAPI interface 
This splits out the pure-virtual definition of the architecture API into
ArchAPI; leaving BaseArch to only provide default implementations (which
can now be completely opted out of by deriving from ArchAPI instead of
BaseArch).

Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
b4227f586c Rename ArchBase to BaseArch for consistency with BaseCtx 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
297cd026b9 Add default implementation of bel bucket functions 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
ed8e3c83d9 Add default implementation of some range-returning functions 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
6d794abf49 Add a few more functions to ArchBase 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
d4363b7ee5 ecp5: Use common wire/pip binding 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
b866601b63 Fix now-illegal use of reinterpret_cast 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
ba5568d501 nextpnr: Example of shared wire/bel/pip binding code 
Currently not actually being tested

Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
cfa9a9daec nextpnr: Use templates to specify range types 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
8f76af40db nextpnr: Add base virtual functions for non-range Arch API 
This makes the Arch API clearer and also allows a base implementation of
functions to reduce the amount of complexity to get a basic Arch up and
running.

Currently this only implements these for functions that don't return a
range. Range-returning functions will require more work in order due to
the current 'duck typing' approach (probably a struct that contains the
range types combined with templating.)

Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
David Shah
8b4163b77c
Merge pull request #567 from litghost/initial_fpga_interchange 
Initial FPGA interchange arch
 2021-02-05 19:15:29 +00:00
Keith Rothman
a0ee42833b Add RelSlice::ssize and use it when comparing with signed ints. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-05 10:12:13 -08:00
Keith Rothman
9557047e5e Move all string data into BBA file. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-05 09:22:55 -08:00
David Shah
b0f9b7834e
Merge pull request #570 from litghost/make_id_string_list_explicit 
Mark IdString and IdStringList single argument constructors explicit.
 2021-02-05 11:32:09 +00:00
D. Shah
450bfae86c generic: Fix pin names accidentally being IdStringList not IdString 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 10:43:35 +00:00
Keith Rothman
ca32e935a6 Use RelSlice instead of RelPtr in cases where sizes are present. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:34 -08:00
Keith Rothman
f1ee2fde58 Update APIs to conform to style guide. 
- Change non-Arch methods to snake_case
 - Adds some utility functions to for accessing bel_data.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:34 -08:00
Keith Rothman
9afa8a9bea Remove unused method getReservedWireNet. 
This was a holdover from the nextpnr-xilinx arch.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00
Keith Rothman
22c3c9c303 Update copywrite headers. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00
Keith Rothman
58c90184f6 Correct some typos. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00
Keith Rothman
d8fa9d7f36 Fix warnings with signed/unsigned. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00
Keith Rothman
d4f66a73c1 Fix fpga_interchange/README.md duplicate patch statement. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00
Keith Rothman
90ece77f8d Fix URLs in Markdown. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00
Keith Rothman
dc47c6d9ec Add empty constids.inc for build. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00
Keith Rothman
0b911e484c Run "make clangformat". 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00
Keith Rothman
149087b880 Add README about initial state of FPGA interchange implementation. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00
Keith Rothman
78737ab01d Update FPGA interchange to use IdStringList. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00
Keith Rothman
083f6afb1c Add initial GUI files. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00
Keith Rothman
4a62c8c2eb Start adding data for placement constraint solving. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00
Keith Rothman
5c16c5024d Debug BEL bucket data. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00
Keith Rothman
cd41c4001e Add initial updates to FPGA interchange arch for BEL buckets. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-04 16:38:33 -08:00