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56dfd5564a
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133 Commits

Author SHA1 Message Date
David Shah
56dfd5564a timing: Fix xclock crit calc and compiler warnings 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
f53dc8d3c9 timing_opt: Improve heuristics 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
a990a1576c timing_opt: Fix criticality and cost calculations 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
0f40e5fe8c timing: Fixes to criticality calculation 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
254c5ea359 clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
e1c74ad3db timing_opt: Fixes including single-move legality 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
2de506c071 timing_opt: Functions to calculate arc delay limits 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
83e3277577 timing_opt: Implement neighbour Bel finder 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
9a42b64a68 timing: Add criticality calculation to timing analysis 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
fe670cf3f6 clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-26 09:37:39 +00:00
David Shah
22ac41d627
Merge pull request #138 from YosysHQ/refactor_log 
Tidy up logging code, add log file support, make timing failures non-fatal errors
 2018-11-26 09:37:07 +00:00
David Shah
b035cb9fcf Add nonfatal error support and use for timing failures 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-26 09:22:42 +00:00
David Shah
51d1363dfe Change the log level of some timing-related messages 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-21 17:13:53 +00:00
David Shah
72b53016c0 timing: Improve crit path statistics 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 16:24:06 +00:00
David Shah
1ae722272a ecp5: clangformat timing changes 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:27:03 +00:00
David Shah
50b85da619 ecp5: Use speed-grade-specific delay estimate 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:26:28 +00:00
David Shah
13244e513b ecp5: Fix db import, improve timing data debugging 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:26:28 +00:00
David Shah
9c52afcf5f clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:25:51 +00:00
Eddie Hung
e1d2c595a1 Improve message spacing 2018-11-14 18:27:43 -08:00
Eddie Hung
06ddb632d1 Merge remote-tracking branch 'origin/master' into timingapi 2018-11-14 17:59:21 -08:00
David Shah
adc50a207f Timing fixes 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-11-14 08:46:10 +00:00
Eddie Hung
42d1990784 [timing] Path report to include pips when --verbose set 2018-11-13 16:32:06 -08:00
Eddie Hung
9f13bc7eb0 [timing] Crit path report to print out edges 2018-11-13 14:14:51 -08:00
David Shah
ba7a7a3733 timing: Fix compile warning 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
David Shah
fc5e6bec9a timing: Add support for clock constraints 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
David Shah
8af86ff37d ecp5: Update arch to new timing API 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
David Shah
bd2b3e5e02 timing: Fix Fmax for clocks with mixed edge usage 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
David Shah
07e265868b archapi: Add getDelayFromNS to improve timing algorithm portability 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
David Shah
e633aa09cc timing: Fix handling of clock inputs 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
David Shah
fad69d4930 timing: Don't include false startpoints in async paths 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
David Shah
cba9b528e8 timing: Improve Fmax output and print cross-clock paths 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
David Shah
143abc6034 timing: Multiple clock analysis 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
David Shah
9687f7d1da Working on multi-clock analysis 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
David Shah
3ca02cc55c Working on adding multiple domains to timing analysis 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
David Shah
83b1c43630 timing: Working on a timing constraint API 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-11-12 14:03:58 +00:00
Eddie Hung
7af788f9e3 [timing] Fix combinational -> combinatorial 2018-11-11 13:49:09 -08:00
Eddie Hung
32517dfb04 [timing] Better messaging for failed timing analysis, allow --force to 
continue
 2018-11-11 13:23:00 -08:00
Eddie Hung
96efe48847
Merge pull request #88 from YosysHQ/issue72 
Resolve issue #72
 2018-10-11 02:54:19 -07:00
David Shah
9ebec3b87f clangformat 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-01 18:20:14 +01:00
David Shah
c8a9bb807c ecp5: Debugging DRAM packing 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-01 17:45:35 +01:00
Eddie Hung
8749327f1e [timing] Restore and skip false startpoints 2018-09-15 15:17:37 -07:00
Eddie Hung
32a4c5bd79 Fix for min_slack == max_slack => bin_size == 0 2018-08-22 09:24:30 -07:00
Miodrag Milanovic
8420cb4c80 Fix MSVC compile 2018-08-09 11:00:24 +02:00
David Shah
3e11ba8afb timing: Remove unused variable 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 17:55:54 +02:00
David Shah
8e593fb471 timing: Update to use getDelayNS 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 17:54:25 +02:00
Eddie Hung
03575a2a7a One more breadcrumb 2018-08-08 08:32:17 -07:00
Eddie Hung
91023d2a0e Leave comment behind about removing false paths 2018-08-08 08:31:08 -07:00
David Shah
90e3db324e clangformat 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 17:07:20 +02:00
Eddie Hung
936b52eafc Unfurl comments for clangformat 2018-08-08 08:01:24 -07:00
Eddie Hung
fca01f5447 Also include TMG_GEN_CLOCK as a timing startpoint 2018-08-08 07:49:07 -07:00