David Shah
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5a1190ade2
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ecp5: Fix UR PLL tile coordinates
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-26 15:35:55 +00:00 |
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David Shah
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bbeab72ad9
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Merge pull request #143 from daveshah1/ecp5_muxes
ecp5: Adding support for LUT extension muxes up to LUT7
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2018-11-26 09:37:18 +00:00 |
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David Shah
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65a5d05952
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python: Fixes to get net wires map working
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-22 13:42:20 +00:00 |
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David Shah
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76f575fb29
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ecp5: Add support for LUT7 mux
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-18 17:17:46 +00:00 |
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David Shah
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458aa20161
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ecp5: More optimal LUT6 placement
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 17:36:34 +00:00 |
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David Shah
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3ae8b86003
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ecp5: Adding mux support up to LUT6
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 17:27:23 +00:00 |
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David Shah
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94dc54f4fa
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ecp5: Add 10% safety margin to pip delays
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 13:35:01 +00:00 |
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David Shah
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1ae722272a
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ecp5: clangformat timing changes
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 13:27:03 +00:00 |
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David Shah
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50b85da619
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ecp5: Use speed-grade-specific delay estimate
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 13:26:28 +00:00 |
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David Shah
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13244e513b
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ecp5: Fix db import, improve timing data debugging
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 13:26:28 +00:00 |
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David Shah
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19cc284b8c
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ecp5: Allow selection of device speed grade
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 13:26:28 +00:00 |
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David Shah
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ffe1166e33
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ecp5: Post-rebase fix
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 13:26:28 +00:00 |
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David Shah
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2024346f4d
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ecp5: Consider fanout when calculating pip delays
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 13:26:28 +00:00 |
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David Shah
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cc746d888b
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ecp5: Fix timing pip classes
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 13:26:28 +00:00 |
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David Shah
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3ecd440748
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ecp5: Use new timing data
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 13:26:28 +00:00 |
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David Shah
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703ff2818f
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ecp5: Fix timing data import
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 13:26:28 +00:00 |
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David Shah
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18813f2056
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ecp5: Adding real timing data to database
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 13:26:28 +00:00 |
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David Shah
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9c52afcf5f
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clangformat
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 13:25:51 +00:00 |
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David Shah
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cfaa6c0e5d
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Merge pull request #119 from cr1901/win-fix
nextpnr-ecp5 Windows Fixes
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2018-11-16 10:00:13 +00:00 |
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David Shah
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f07bd98d59
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ecp5: Better use of Boost
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-16 09:58:18 +00:00 |
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David Shah
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7e1df82462
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ecp5: Regression fix & format
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:54:28 +00:00 |
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David Shah
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91a0927196
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ecp5: Support LOC attribute on DCUs
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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David Shah
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01e0da16f0
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ecp5: Add DCU availability check
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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David Shah
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02736d0680
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ecp5: Add timing info for SERDES
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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David Shah
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084f9cf63f
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ecp5: DCU clocking fixes
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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David Shah
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0eba7d9789
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ecp5: EXTREFB fixes
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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David Shah
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bc022173f0
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ecp5: clangformat
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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David Shah
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36178a5713
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ecp5: Trim IO connected to top level ports
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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David Shah
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e9fe444dc7
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ecp5: Adding ancillary DCU bels
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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David Shah
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37cbabecfb
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ecp5: remove debug and clangformat
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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David Shah
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c9d83ec08b
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dcu: Fix bitstream param handling
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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David Shah
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4f8dfd8e1b
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ecp5: Prefer DCCs with dedicated routing when placing DCCs
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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David Shah
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c5a3571a06
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ecp5: Working on DCU
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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David Shah
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983903887d
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ecp5: DCU bitstream gen handling
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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David Shah
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cc9fb1497d
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ecp5: Groundwork for DCU support
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-15 11:30:27 +00:00 |
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Eddie Hung
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2d39cde17b
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Merge remote-tracking branch 'origin/master' into timingapi
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2018-11-13 12:12:11 -08:00 |
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Eddie Hung
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3b2b15dc4a
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Merge pull request #107 from YosysHQ/router_improve
Major rewrite of "router1"
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2018-11-13 11:39:51 -08:00 |
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David Shah
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959d163ba7
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ecp5: Improve delay estimates
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-13 14:27:23 +00:00 |
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Pedro Vanzella
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710ea1b265
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Mark getArchOptions as override in derived classes
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2018-11-13 11:03:48 -02:00 |
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Clifford Wolf
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06e0e1ffee
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Various router1 fixes, Add BelId/WireId/PipId::operator<()
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2018-11-13 05:05:56 +01:00 |
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David Shah
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d3ad522bfe
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ecp5: Copy clock constraints during global promotion
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-12 14:03:58 +00:00 |
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David Shah
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fc5e6bec9a
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timing: Add support for clock constraints
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-12 14:03:58 +00:00 |
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David Shah
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11579a1046
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ecp5: EBR clocking fix
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-12 14:03:58 +00:00 |
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David Shah
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8af86ff37d
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ecp5: Update arch to new timing API
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-12 14:03:58 +00:00 |
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Clifford Wolf
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6002a0a80a
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clangformat
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2018-11-11 19:48:15 +01:00 |
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Clifford Wolf
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f93129634b
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Add getConflictingWireWire() arch API, streamline getConflictingXY semantic
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2018-11-11 17:28:41 +01:00 |
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David Shah
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9e5aded5c6
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ecp5: Fix 85k PLL_LR
Signed-off-by: David Shah <dave@ds0.me>
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2018-11-11 15:12:27 +00:00 |
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Clifford Wolf
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d2bdb670c0
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Add getConflictingPipWire() arch API, router1 improvements
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2018-11-11 11:34:38 +01:00 |
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Miodrag Milanovic
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0ad5197ff4
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show 4th tresllis_io in tile bounds
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2018-11-11 08:25:54 +01:00 |
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William D. Jones
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14ad19e064
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Use native PATH environment-variable separator on Windows for PYTHONPATH. Fixes 'Bad address' error in cmake.
Signed-off-by: William D. Jones <thor0505@comcast.net>
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2018-11-03 13:12:37 -04:00 |
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