This uses a new data structure for net.users that allows gaps, so
removing a port from a net is no longer an O(n) operation on the number
of users the net has.
Signed-off-by: gatecat <gatecat@ds0.me>
This replaces the arch-specific DelayInfo structure with new DelayPair
(min/max only) and DelayQuad (min/max for both rise and fall) structures
that form part of common code.
This further reduces the amount of arch-specific code; and also provides
useful data structures for timing analysis which will need to delay
with pairs/quads of delays as it is improved.
While there may be a small performance cost to arches that didn't
separate the rise/fall cases (arches that aren't currently separating
the min/max cases just need to be fixed...) in DelayInfo, my expectation
is that inlining will mean this doesn't make much difference.
Signed-off-by: gatecat <gatecat@ds0.me>
This makes the difference clearer between the general arch API that
everyone must implement; and helper functions specific to one arch.
Signed-off-by: D. Shah <dave@ds0.me>
This replaces RelPtrs and a separate length field with a Rust-style
slice containing both a pointer and a length; with bounds checking
always enforced.
Thus iterating over these structures is both cleaner and safer.
Signed-off-by: D. Shah <dave@ds0.me>
It's been confirmed that :
(1) this is required by the hardware
(2) icecube will force that field to 4'b1111 in fixed mode
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Because the PLLs drive global networks, we need to account for
already existing and placed SB_GBs when trying to place/pack them.
Theses can be user instanciated SB_GBs with BEL attribute, or
SB_GB_IOs that got converted during the IO packing.
This patch assumes that:
- If a PLL is used the output A global network is always used, even
if there is no connection to the global output pin
- If a PLL with a singe output is used, then the B output global
network is still free to be used by whatever.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This is mostly for the benefit of PLL placement because the D_IN_x
ports are used for other purposes when PLL is enabled so we need to
make sure nothing is connected there already. (even an unused net is
too much)
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>