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730 Commits

Author SHA1 Message Date
David Shah
122771cac3 timing: iCE40 Arch API changes for clocking info 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
David Shah
becf3021bd ice40: Don't set colbuf bits for 384 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-11-11 23:52:04 +01:00
Clifford Wolf
6002a0a80a clangformat 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-11-11 19:48:15 +01:00
Clifford Wolf
f93129634b Add getConflictingWireWire() arch API, streamline getConflictingXY semantic 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-11-11 17:28:41 +01:00
Clifford Wolf
d2bdb670c0 Add getConflictingPipWire() arch API, router1 improvements 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-11-11 11:34:38 +01:00
Miodrag Milanović
6b197fde72
Merge pull request #93 from YosysHQ/gui_changes 
Gui changes
 2018-11-10 23:00:34 -08:00
David Shah
8df72a1f34 ice40: Fix SPRAM and IO globals 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-04 14:13:53 +00:00
David Shah
af9ed378b4 ice40: Fix PLL DYNAMICDELAY 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-27 23:28:25 +02:00
Miodrag Milanovic
4c0db11608 fix grid dimensions for ice40 2018-10-27 12:02:01 +02:00
Miodrag Milanovic
69b9aaba9d ups, uncomment 2018-10-27 11:52:29 +02:00
Miodrag Milanovic
61b2fcf7da Fixed pip graphics 2018-10-27 11:50:40 +02:00
Eddie Hung
96efe48847
Merge pull request #88 from YosysHQ/issue72 
Resolve issue #72
 2018-10-11 02:54:19 -07:00
Clifford Wolf
b4dc6b8845 Add info message for promoted global nets 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-10-03 13:40:21 +02:00
David Shah
7ef8a7415d ice40: Add error for bad PACKAGE_PIN connections 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-03 12:14:49 +01:00
David Shah
a27c7b45de Refactor chain finder to its own file 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-30 16:29:26 +01:00
David Shah
ea03aafc26 clangformat 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-30 15:13:18 +01:00
Clifford Wolf
07cf349ee4
Merge pull request #79 from YosysHQ/ice40lvds 
ice40: Adding LVDS input support
 2018-09-25 18:21:56 +02:00
Clifford Wolf
1eb7411fb0
Merge pull request #76 from YosysHQ/plloutglobal_fix 
Add needed PLLOUTGLOBAL ports and mapped it
 2018-09-25 18:15:00 +02:00
David Shah
f1aa7093fe ice40: Fix carry packer bug 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-25 15:52:32 +01:00
David Shah
dea87e46c4 ice40: LVDS input bitstream support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-24 17:58:55 +01:00
David Shah
2ee86ab5a8 ice40: Tristate IO support fixes 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-24 15:25:37 +01:00
David Shah
d5d9fb27a6 ice40: Validity check for LVDS IO 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-24 15:14:28 +01:00
David Shah
9834b68041 ice40: Remove obsolete belType member 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-24 14:27:50 +01:00
Miodrag Milanovic
f8e258825f Added required checks for PLL and fixed messages eol 2018-09-19 18:41:28 +02:00
Eddie Hung
c9059fc7d0 [ice40] TimingPortClass of LC.O ports without any inputs now TMG_IGNORE 2018-09-15 15:16:21 -07:00
Miodrag Milanovic
fdf7593c42 Add needed PLLOUTGLOBAL ports and mapped it properly 2018-09-12 18:33:08 +02:00
Serge Bazanski
8ed64450f3
Merge pull request #56 from YosysHQ/q3k/issue-55 
ice40: make PLL packing more robust
 2018-08-19 21:37:02 +01:00
Sergiusz Bazanski
1bf22a7f64 ice40: make PLL packing more robust 2018-08-19 21:30:55 +01:00
Clifford Wolf
801f630983 Add more missing iCE40 gfx (LP/HX is complete now) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-19 18:43:38 +02:00
Clifford Wolf
49d3857f97 Add iCE40 gfx for carry chain pips and LUT cascade pips 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-19 17:55:54 +02:00
Clifford Wolf
e45769292a Fix iCE40 pip gfx for pips on the top edge of a switchbox 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-19 17:23:21 +02:00
Clifford Wolf
b7d4c7afd9 Add iCE40 gfx for IO span-4 corners 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-19 16:53:34 +02:00
Clifford Wolf
7cdafb8121 Add iCE40 gfx for span-4 wires between IO tiles 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-19 16:31:02 +02:00
Clifford Wolf
26be6f9761
Merge pull request #47 from YosysHQ/settings_propagate 
Use settings for placer1 and router1
 2018-08-18 19:25:19 +02:00
Clifford Wolf
a346793c19 Add iCE40 gfx for wires connecting fabric tiles and IO tiles 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-18 17:17:01 +02:00
Clifford Wolf
456a83430a Improve iCE40 gfx for IO tiles and RAM tiles 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-18 16:20:33 +02:00
Clifford Wolf
5500cf3aff Add ice40 wire attributes (grid position, segment list) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-18 14:14:27 +02:00
Clifford Wolf
97520bb728 Merge branch 'master' of github.com:YosysHQ/nextpnr into archattr 2018-08-18 13:06:21 +02:00
Miodrag Milanovic
3c51007026 do not break if there are no nets loaded from sym section 2018-08-18 10:28:50 +02:00
Clifford Wolf
428f0b9eba Add Arch attrs API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-14 17:16:14 +02:00
Eddie Hung
fc0496ec71 Merge remote-tracking branch 'origin/master' into placer_speedup 2018-08-10 19:51:35 -07:00
Eddie Hung
a41500a015 Rework Arch::logicCellsCompatible() to take pointer + size, allowing use of std::array 2018-08-10 19:50:27 -07:00
Miodrag Milanovic
e5006d4f2f Save settings and give nicer names to some 2018-08-10 19:11:30 +02:00
Eddie Hung
396cae5118 Make containers static 2018-08-09 20:53:33 -07:00
Miodrag Milanovic
93a0d24560 Use settings for placer1 and router1 2018-08-09 18:39:10 +02:00
David Shah
ed602baa06
Merge pull request #42 from YosysHQ/floorplan 
Add basic data structures for floorplanning
 2018-08-09 10:49:11 +02:00
Clifford Wolf
5ddde5c49f Add pip locations 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-09 10:39:53 +02:00
Eddie Hung
41e05c95aa ice40: Speedup Arch::predictDelay() with pass-by-ref 2018-08-08 19:52:39 -07:00
Miodrag Milanovic
61bce47f3c Use settings for json and pcf 2018-08-08 20:14:18 +02:00
Clifford Wolf
f6189e4677 Merge branch 'master' of github.com:YosysHQ/nextpnr into constids 2018-08-08 19:35:13 +02:00
David Shah
cd4e761bb7
Merge pull request #44 from YosysHQ/improve_timing_spec 
Speed up budget allocator using topographical ordering and update cell timing API
 2018-08-08 19:23:47 +02:00
Miodrag Milanovic
46aa56021b Moved option to common 2018-08-08 18:34:12 +02:00
Miodrag Milanovic
fc5cee6fb8 clangformat 2018-08-08 18:17:34 +02:00
David Shah
751335977f ice40: Add error for unknown cell type when getting timing info 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 18:07:34 +02:00
Clifford Wolf
f875a37467 Get rid of old iCE40 id_ Arch members 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-08 17:17:16 +02:00
David Shah
433ad6462e Arch API: Removing Arch::isIOCell 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 17:06:59 +02:00
Clifford Wolf
e03ae50e21 Get rid of PortPin and BelType (ice40, generic, docs) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-08 17:01:18 +02:00
David Shah
e6eb203868 ice40: Add timing arcs through global buffers 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 16:34:41 +02:00
David Shah
d173ddba36 timing: Debugging implementation of new timing API 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 15:15:21 +02:00
David Shah
787fe5661c ice40: Timing arch fix 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 15:00:39 +02:00
David Shah
d8b3830031 timing: Update to new use API (currently broken) 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 14:58:43 +02:00
David Shah
bf42e525cb Arch API: New specification for timing port classes 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 14:37:59 +02:00
Miodrag Milanovic
5df90bc5a5 Merge remote-tracking branch 'origin/master' into common_main 
# Conflicts:
#	ecp5/main.cc
#	ice40/main.cc
 2018-08-08 10:48:05 +02:00
Eddie Hung
f44a5fb904 clangformat 2018-08-06 17:35:23 -07:00
Eddie Hung
1b9a664bb1 Merge branch 'master' into assign_budget_speedup 2018-08-06 12:30:24 -07:00
Eddie Hung
9addcac09c ice40's getBudgetOverride() to return correct delay for different devices 2018-08-06 12:22:13 -07:00
Eddie Hung
21cd1d7dd6 Add new Arch::isIOCell() API function 2018-08-06 12:11:47 -07:00
Miodrag Milanovic
fffaaa613f Added project loader 2018-08-06 19:32:17 +02:00
Eddie Hung
0f3459dbe5 Fix ice40's getBudgetOverride() to override only for COUT -> CIN 2018-08-06 08:22:08 -07:00
Eddie Hung
823ceaacbf Change getBudgetOverride() signature to return bool and modify budget in place 2018-08-06 07:56:28 -07:00
Eddie Hung
f048deb33d Restore initial assign_budget() call after pack(), restrict call after initial_placement to slack_redist 2018-08-05 22:55:58 -07:00
David Shah
1ce0b5add2 API change: Use CellInfo* and NetInfo* as cell/net handles (Python bindings) 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-05 16:21:13 +02:00
Miodrag Milanovic
7794bbfb3f Fix message for pcf loading 2018-08-05 16:13:49 +02:00
Miodrag Milanovic
3bb9a7df01 Added command parser and common implementation 2018-08-05 16:13:34 +02:00
Clifford Wolf
5e53075990 API change: Use CellInfo* and NetInfo* as cell/net handles (common, ice40) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-05 15:25:42 +02:00
Clifford Wolf
287fe7e894 clangformat 2018-08-05 14:18:34 +02:00
Clifford Wolf
528eddcaf7 Fix bug in ice40 estimateDelay() 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 22:29:43 +02:00
Clifford Wolf
175da732ac Use faster model for ice40 predictDelay() 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 20:16:43 +02:00
Clifford Wolf
f6b3333a7d Add new iCE40 delay estimator and delay predictor 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 19:50:49 +02:00
David Shah
67347573c2 ice40: Bitstream gen for LUT permutation 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-04 18:23:48 +02:00
Clifford Wolf
31fe52581b Add generation of models to tmfuzz 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 16:54:12 +02:00
Clifford Wolf
bd36cc1275 Refactor ice40 timing fuzzer used to create delay estimates 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 13:41:42 +02:00
Clifford Wolf
700e68746a Fix bug in ice40 chipdby.py add_wire() that moves some wires to X0/Y0 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 13:33:24 +02:00
Clifford Wolf
086bc941a8 Remove SVG functionality from ice40 main 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 11:52:35 +02:00
Clifford Wolf
96291f17aa Merge branch 'master' of github.com:YosysHQ/nextpnr into lutperm 2018-08-04 10:32:07 +02:00
Eddie Hung
d66edf5223 Merge branch 'master' into slack_redist_freq 2018-08-03 23:43:53 -07:00
David Shah
65d73eb983
Merge pull request #23 from daveshah1/use_placeconstr 
Making use of relative constraints
 2018-08-04 08:32:42 +02:00
David Shah
affc6da1af ice40: Add SB_GB timing to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-04 08:28:13 +02:00
David Shah
082b8bf272 clangformat 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-04 08:18:04 +02:00
David Shah
176a23936c Tidy up 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-04 08:15:49 +02:00
Eddie Hung
3d5dcda12c Auto frequency only if --freq 0 is set 2018-08-03 19:53:32 -07:00
Clifford Wolf
8d372b86f3 Proper ice40 wire types 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-03 21:11:12 +02:00
David Shah
b937e6defe Add constraint weight as a command line option 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 18:31:54 +02:00
Clifford Wolf
2a1d54389f Add iCE40 pseudo-pips for lut permutation 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-03 17:37:59 +02:00
David Shah
fd2174149c Fixing constraint placement bugs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 16:29:44 +02:00
David Shah
8c518cb838 Fixing relative constraint implementation 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 15:40:01 +02:00
David Shah
7e9209878c Reworking packer and placer to use new generic rel legaliser 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 15:00:32 +02:00
David Shah
26c68c4bcc Remove old place legaliser, set placement constraints instead (currently ignored by placer) 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 13:18:48 +02:00
Clifford Wolf
80e6b17ec9
Merge pull request #21 from daveshah1/promote_logic_globals 
ice40: Promote 'logic' globals as well as clock/enable/reset
 2018-08-03 12:51:55 +02:00
Clifford Wolf
e673d9d2db
Merge pull request #22 from YosysHQ/routethru 
Add iCE40 LUT route-through pips
 2018-08-03 12:51:37 +02:00
David Shah
483f1b772c ice40: Promote 'logic' globals as well as clock/enable/reset 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 09:56:56 +02:00
David Shah
35bc80e130 ice40: Add bitstream gen for routethru LUTs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 09:26:37 +02:00
Miodrag Milanovic
a761b772c8 Make worker generic 2018-08-02 18:10:01 +02:00
Miodrag Milanović
e46209e734
Merge pull request #11 from mmicko/project_load 
preserve command line parameters for project load
 2018-08-02 08:24:49 -07:00
Clifford Wolf
36009645ce Add LUT route-through pips to iCE40 architecture database 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-02 16:28:47 +02:00
David Shah
a7269a685e ice40: Use real cell timings 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-02 16:02:51 +02:00
David Shah
c0aaac8dfa ice40: Adding cell timings to chipdb 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-02 15:20:43 +02:00
Clifford Wolf
6ccf8629b5 Add Router1Cfg 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-02 13:58:23 +02:00
Miodrag Milanovic
869a804ee1 preserve command line parameters for project load 2018-08-02 06:29:21 +02:00
Clifford Wolf
29dd98420b Remove getFrameDecal() API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-01 11:30:11 +02:00
David Shah
0414c93403 ice40: Add HFOSC support, force fabric routing on oscillators for now 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-01 09:45:08 +02:00
David Shah
bbd2ecf558 clangformat 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-01 09:33:52 +02:00
Miodrag Milanovic
009bed51cb Display warning only if gui is not used 2018-08-01 08:26:50 +02:00
Miodrag Milanovic
8293569c32 Fix filenames for MSVC build 2018-08-01 08:16:38 +02:00
David Shah
b1a9978922 Merge branch 'redist_slack' into 'master' 
Update budgets throughout placement and routing

See merge request SymbioticEDA/nextpnr!16
 2018-08-01 05:59:34 +00:00
Eddie Hung
92ec2cd138 clangformat for stuff I've touched 2018-07-31 20:57:36 -07:00
Sergiusz Bazanski
85fc356fc1 clangformat 2018-08-01 03:59:27 +01:00
Eddie Hung
f646ec790a Modify the getNetinfo*() functions and getBudgetOverride() to not use 
user_idx and to take a PortRef& instead
 2018-07-31 19:31:54 -07:00
Eddie Hung
720e815865 Add --slack_redist_iter for ice40 2018-07-31 19:07:39 -07:00
Eddie Hung
5d58d6ad1b Merge branch 'redist_slack' of gitlab.com:SymbioticEDA/nextpnr into redist_slack 2018-07-31 18:26:39 -07:00
Eddie Hung
2d75053744 Merge remote-tracking branch 'origin/estdelay' into redist_slack 
Conflicts:
	ecp5/arch.cc
	generic/arch.cc
	ice40/arch.cc
 2018-07-31 16:18:08 -07:00
Eddie Hung
70747b9355 Merge branch 'redist_slack' into 'redist_slack' 
# Conflicts:
#   common/timing.cc
 2018-07-31 17:51:56 +00:00
Clifford Wolf
41726087b7 getChipName() should be const 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-31 17:01:38 +02:00
Clifford Wolf
2652485a01 Use icestorm timing information 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-31 16:43:19 +02:00
Clifford Wolf
32ff0059fe Add binary search to getBelPinWire() and getBelPinType() 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-31 11:55:25 +02:00
Eddie Hung
07e2c9ba99 assign_budget() after initial placement, not after pack 2018-07-30 22:20:49 -07:00
Eddie Hung
a82f6f4105 Modify predictDelay signature 2018-07-30 21:51:30 -07:00
Eddie Hung
a099aca3c2 Modify predictDelay signature 2018-07-30 19:19:30 -07:00
Eddie Hung
d5049bf0ed Merge remote-tracking branch 'origin/estdelay' into redist_slack 2018-07-30 18:59:04 -07:00
Eddie Hung
46b7469652 Merge remote-tracking branch 'origin/master' into redist_slack 2018-07-30 18:14:40 -07:00
Clifford Wolf
b121008372 Towards better ice40 timing data 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-30 17:17:07 +02:00
David Shah
b09183db3b Use DelayInfo for cell timing instead of delay_t 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-30 16:59:30 +02:00
David Shah
84e0082925 cmake: Set --fast and --slow chipdb.py arguments 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-30 16:40:56 +02:00
Clifford Wolf
3d8b0087c3 Add ice40 chipdb.py --fast/--slow 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-30 16:36:34 +02:00
Clifford Wolf
8f9b031ef0 Add iCE40 fast/slow delay fields to chipdb 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-30 16:21:20 +02:00
David Shah
267970c01e ice40: Improving legalisation move statistics 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-30 16:18:49 +02:00
David Shah
edc6cf8b23 ice40: Print legalisation statistics 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-30 16:13:02 +02:00
Clifford Wolf
0daffec2a0 Add predictDelay Arch API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-30 15:35:40 +02:00
Clifford Wolf
0db86b8619 Improve ice40/benchmark 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-30 13:57:14 +02:00
Eddie Hung
beabb429b0 clangformat 2018-07-28 14:11:43 -07:00
Eddie Hung
02b3bda7f6 ice40 estimateDelay to account for out/in muxes 2018-07-27 19:52:45 -07:00
Eddie Hung
cd561b4316 getBudgetOverride() now handles COUT crossing tiles 2018-07-26 22:30:15 -07:00
Eddie Hung
97e546041e Revert "Remove Arch::getBudgetOverride()" 
This reverts commit 749dae4ae5.
 2018-07-26 21:37:19 -07:00
Eddie Hung
d5c2332ebf Merge remote-tracking branch 'origin/master' into redist_slack 2018-07-26 21:00:26 -07:00
Sergiusz Bazanski
c37d2baaf6 common: rename GraphicElement::{style,type} enums, add _MAX members 2018-07-26 16:39:19 +01:00
Clifford Wolf
03f92948d1 clangformat and GraphicElement::style comments 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-26 17:14:56 +02:00
Clifford Wolf
467e0926f9 Add getWireType()/getPipType() API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-26 16:38:11 +02:00
Clifford Wolf
6a59b8522c Move iCE40 switchbox gfx to UI groups 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-26 16:21:01 +02:00
Clifford Wolf
7152ae1e3d Add iCE40 pip gfx for carry_in mux 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-26 15:42:32 +02:00
Clifford Wolf
a86c4f2f5d Improvements in bbasm 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-26 15:22:52 +02:00