gatecat
91064c7ec8
nexus: Add pin definitions for DPHY
...
Signed-off-by: gatecat <gatecat@ds0.me>
2021-03-08 15:59:18 +00:00
gatecat
55fa8b7745
nexus: Fix copypasta
...
Signed-off-by: gatecat <gatecat@ds0.me>
2021-03-08 14:40:13 +00:00
gatecat
f0e30abf62
nexus: Fail gracefully when seeing special pins
...
Signed-off-by: gatecat <gatecat@ds0.me>
2021-03-05 12:15:58 +00:00
gatecat
1ff2023f32
timing: Replace all users of criticality with new engine
...
Signed-off-by: gatecat <gatecat@ds0.me>
2021-03-04 11:29:11 +00:00
gatecat
685cc23b94
nexus: Fix global handling for LIFCL-17
...
Signed-off-by: gatecat <gatecat@ds0.me>
2021-03-03 13:46:05 +00:00
gatecat
20f0ba9526
nexus: Fix getPipDelay returning negative after refactor
...
Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-23 12:21:55 +00:00
gatecat
7922b3bfc4
Replace DelayInfo with DelayPair/DelayQuad
...
This replaces the arch-specific DelayInfo structure with new DelayPair
(min/max only) and DelayQuad (min/max for both rise and fall) structures
that form part of common code.
This further reduces the amount of arch-specific code; and also provides
useful data structures for timing analysis which will need to delay
with pairs/quads of delays as it is improved.
While there may be a small performance cost to arches that didn't
separate the rise/fall cases (arches that aren't currently separating
the min/max cases just need to be fixed...) in DelayInfo, my expectation
is that inlining will mean this doesn't make much difference.
Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-19 11:31:33 +00:00
gatecat
c7c13cd95f
Remove isValidBelForCell
...
This Arch API dates from when we were first working out how to
implement placement validity checking, and in practice is little used by
the core parts of placer1/HeAP and the Arch implementation involves a
lot of duplication with isBelLocationValid.
In the short term; placement validity checking is better served by the
combination of checkBelAvail and isValidBelForCellType before placement;
followed by isBelLocationValid after placement (potentially after
moving/swapping multiple cells).
Longer term, removing this API makes things a bit cleaner for a new
validity checking API.
Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-16 13:31:36 +00:00
gatecat
1b6cdce925
Merge pull request #575 from YosysHQ/gatecat/belpin-2
...
Support for cell pin to bel pin mappings
2021-02-15 09:38:22 +00:00
Keith Rothman
99e397000c
Add getBelHidden and add some missing "override" statements.
...
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-11 14:58:02 -08:00
gatecat
535723f414
Start making use of getBelPinsForCellPin API
...
This replaces getNetinfoSinkWire with 3 new functions for different use
cases.
At the moment all existing code has been moved to getNetinfoSinkWire
with phys_idx=0 so the build doesn't break; but this won't yet function
properly with more than one sink. But it provides a base on which to
work on refactoring the routers to support this case.
Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-10 14:18:12 +00:00
gatecat
11db5a2f1d
Add BaseArchRanges for default ArchRanges types
...
Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-09 10:39:14 +00:00
gatecat
bcf81f0e71
Merge pull request #568 from YosysHQ/dave/arch-override
...
Create a new BaseArch that formally specifies the Arch API and provides some base implementations
2021-02-08 17:56:08 +00:00
D. Shah
0d444bfc6e
Use RelSlice::ssize instead of cast-to-int throughout
...
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-08 11:24:00 +00:00
D. Shah
efca63862c
Use 'T' postfix to disambiguate LHS and RHS of using
...
Arches might otherwise have range types named ambigiously with the entry
in ArchRanges.
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-08 10:29:50 +00:00
D. Shah
3e631fe2f4
Add archArgs and archArgsToId to Arch API
...
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
D. Shah
f5d2e245e1
nexus: Switch to BaseArch
...
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-05 19:19:17 +00:00
Keith Rothman
c99fbde0eb
Mark IdString and IdStringList single argument constructors explicit.
...
Single argument constructors will silently convert to that type. This
is typically not the right thing to do. For example, the nexus and
ice40 arch_pybindings.h files were incorrectly parsing bel name strings,
etc.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:07 -08:00
D. Shah
6566a011b4
nexus: Implement IdStringList for all arch object names
...
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-02 17:00:33 +00:00
D. Shah
ff92d19fed
arch: Add getNameDelimiter API for string lists
...
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-02 16:59:40 +00:00
Keith Rothman
da74a425d2
Run "make clangformat".
...
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-02 07:44:49 -08:00
Keith Rothman
9089ee2d16
Add pybindings for new APIs.
...
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-02 07:43:36 -08:00
Keith Rothman
9fe546f279
Rename Partition -> BelBucket.
...
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-02 07:34:56 -08:00
Keith Rothman
0338368afa
Add Partition APIs to ice40, nexus, gowin archs.
...
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-02 07:34:56 -08:00
Keith Rothman
2285c8dbbd
Initial refactoring of placer API.
...
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-02 07:34:56 -08:00
Keith Rothman
5cf2f8d1ea
Seperate PipRange types in pybindings_shared.
...
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-01 10:23:21 -08:00
D. Shah
94e8847d67
cleanup: Spelling fixes
...
Signed-off-by: D. Shah <dave@ds0.me>
2021-01-28 15:19:06 +00:00
D. Shah
5fc3e8e4d2
cleanup: Fix compiler warnings
...
Signed-off-by: D. Shah <dave@ds0.me>
2021-01-28 15:02:08 +00:00
D. Shah
b87ab0ee9d
Make RelSlice uncopyable
...
Signed-off-by: D. Shah <dave@ds0.me>
2021-01-27 20:49:14 +00:00
D. Shah
75ee2fc4e6
Move RelPtr/RelSlice out of arches into common
...
The bba approach seems widely used enough that it's reasonable for this
to become part of common code.
Signed-off-by: D. Shah <dave@ds0.me>
2021-01-27 20:43:01 +00:00
D. Shah
e049d5f2fc
nexus: Switch from RelPtr to RelSlice
...
This replaces RelPtrs and a separate length field with a Rust-style
slice containing both a pointer and a length; with bounds checking
always enforced.
Thus iterating over these structures is both cleaner and safer.
Signed-off-by: D. Shah <dave@ds0.me>
2021-01-27 17:24:01 +00:00
David Shah
2c6caf4a9a
nexus: Add MULTADDSUB9X9WIDE support
...
Signed-off-by: David Shah <dave@ds0.me>
2020-12-08 15:49:48 +00:00
David Shah
588042dc99
nexus: Fix LRAM pin types
...
Signed-off-by: David Shah <dave@ds0.me>
2020-12-07 13:26:45 +00:00
David Shah
f923d32620
nexus: Add support for initialised LRAM
...
Signed-off-by: David Shah <dave@ds0.me>
2020-12-07 11:57:10 +00:00
David Shah
270efdca85
nexus: Add basic LRAM support (no init)
...
Signed-off-by: David Shah <dave@ds0.me>
2020-12-02 17:07:34 +00:00
David Shah
86e6a2225c
nexus: Add PLL support
...
Signed-off-by: David Shah <dave@ds0.me>
2020-12-02 15:01:46 +00:00
David Shah
b666c85824
nexus: Add support for deriving timing constraints in packer
...
Signed-off-by: David Shah <dave@ds0.me>
2020-12-02 09:44:17 +00:00
David Shah
5a291e4622
nexus/pdc: Parse simple clock constraints
...
Signed-off-by: David Shah <dave@ds0.me>
2020-12-02 09:34:11 +00:00
David Shah
567166aece
nexus: Fix db integrity check
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
ca73e14cf9
nexus: Add post-place LUTFF optimisation
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
f84850064f
nexus: Improve error handling in global router
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
df3c6dfe3e
nexus: Preliminary integration of DSP timing data
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
76543d05e7
nexus: Tweak heuristics to improve routeability
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
e3b3201d53
nexus: Clocked MULTADDSUB36X36 fix
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
5cf7f01169
nexus: Add MULTADDSUB36X36
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
f795527454
nexus: Add MULTADDSUB18X18 support
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
edd719c5c5
nexus: ACC54 definitions
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
91d746cfc8
nexus: Add DSP pre-adder support
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
fcde8e2d56
nexus: Fix DSP signed ports
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
54539b8519
nexus: Larger DSP tweaks
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
6b5277638b
nexus: Fix slow routing around DSPs
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
160045a058
nexus: Fix validity checking when DSPs are used
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
d8e748bc58
nexus: Refactor DSP macro splitting to make it more generic
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
30c65931b2
nexus: Add support for clocked MULT9X9s
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
9203181625
nexus: Support for unclocked 9x9 multiplies
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
d9a19897c4
nexus: More DSP primitive config
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
094bf419d4
nexus: Miscellaneous DSP infrastructure
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
90608f2c89
nexus: Add some infrastructure for DSP packing
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
c7ad3cece6
nexus: Tweak delay heuristics
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
530d6ce9e9
nexus: Add EBR timing analysis
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
9b89a82573
nexus: Add LUTRAM and WIDEFN9 timing support
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
8c1f25cf31
timing: Add a few more cell types
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
6457b4ca7b
nexus: Swap sort order to make some lookups easier
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
fa9194e3e2
nexus: Add cell delay lookup
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
963fd175ad
nexus: Lookup speed grade and pip delays
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
4e5ad7feac
nexus: Add timing structures to BBA
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
629a06b0ae
nexus: Add error if device not specified
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
f41b4045d4
nexus: Add missing Q_MOC_RUN guard
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
3d41656168
nexus: Default EBR DWS pins to 1
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
0a59cbb8ce
nexus: Use dedicated Vcc routing for OXIDE_COMB pins
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
e6c2887773
nexus: Basic support for carries
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
c89d830e16
nexus: Add WIDEFN9 support
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
00ff7c6cfe
nexus: Default to router2 for now
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
f8dca82a71
nexus: Basic support for differential IO types
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:28 +00:00
David Shah
f749038959
nexus: Improve placer config
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
e8e6316f88
nexus: EBR fixes
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
27ecaf3e88
nexus: EBR FASM generation
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
4503608c7c
nexus: Add packing rules for BRAM
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
8d1678f0ef
nexus: Add stub GUI
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
70749b37d0
nexus: Fix Python bindings
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
1e4eb5ec39
nexus: Ignore some PDC commands
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
cbf99d5e53
nexus: LUTRAM support
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
dfd6b6e39e
nexus: Add a simple global routing pass
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
40441d83cd
nexus: Promote and place global buffers
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
c80144b7f0
nexus: Generate FASM files that can be used standalone
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
901bf2bb1e
nexus: Update for new monolithic prjoxide
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
9affda5626
nexus: Build and embed chipdb automatically
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
7645354917
nexus: More global placement infrastructure
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
2df4d212c3
nexus: Bel search function for DCC placement
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
da1e3c8612
nexus: Add constant/inversion packing
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
1bb509897c
nexus: More pin styles and FASM pinmux gen
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
0eb5c72cc5
nexus: Refactor cell pin style db
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
7f03f4d896
nexus: Tidy up FASM backend
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
d849e2f8b4
nexus: Fix PDC string handling
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
af3af59df4
nexus: Use tilegroups for IO bitgen
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
10ad7d9cfe
nexus: IO packing fix
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
df3866a800
nexus: Add IO packing
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
518ead2e2d
nexus: IO pre-packing
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
69b449c875
nexus: Initial PDC parser integration
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
12013b4c1f
nexus: Lookup of package and IO pins
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
e2de234ef1
nexus: Add pin/pad data to bba
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
e203bd3a2b
nexus: Skeleton of PDC parser
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
0a1afe1f79
nexus: Infrastructure for constant/inv handling
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
2f822a3b79
nexus: Packing helper functions
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
46536773f4
nexus: Rework how constant pins work
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
acb4cf9ead
nexus: Update to planned IO fields
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
75040cdbdf
nexus: Randomise delay to stop router from getting stuck
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
53d1c2c309
nexus: Fix validity checking
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
682351df7f
nexus: Updates and fixes
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
e54aa836a4
nexus: Updates
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
2b13b24cbe
nexus: Bring up to date
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
a586bfc290
nexus: Support Lattice-style parameters
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
84d5426242
nexus: Working on validity checking
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
887d7c717b
nexus: Adding pin definitions
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
46010f33ad
nexus: Globals and naming fixes
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
b5d46a0235
nexus: Add Python bindings
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
a280f893d4
nexus: Add oscillator support
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
f8f3ee06c7
nexus: Add SEIO18 support
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
44f98c545b
nexus: Add global networks
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
140baf7037
nexus: Globals implementation
...
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
3c8a740374
nexus: Add global info to BBA
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
2fc75bae79
nexus: Fix FF naming
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
ee4e30ce8b
nexus/fasm: Fix SLICE lettering
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
1ff42e9936
nexus: Fixes
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
cef0e1db8f
nexus: Minimal IO FASM output
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
689922bc21
nexus: Add FASM export for comb logic and FFs
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
2c49f812d9
nexus: Add packing framework
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
eb15463406
nexus: Add routing FASM export
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
8e53b35fcc
nexus/arch: Add tile loc flags and package structs
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
871f3c66bc
nexus: Logic tile validity check functions
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
b00595f3da
nexus: Add constids
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
1e940323b0
nexus: Add main
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
259659c838
nexus: Add more placeholder Arch functions
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
65a59e9dcc
nexus: Implement bel, wire and pip Arch functions
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
ae1a486520
Add Arch constructor
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
35de36dd59
Implementing some Arch functions
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
c7f00b4760
nexus: Add iterator types based on nextpnr-xilinx
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
60c6510b3b
nexus: Arch utilities
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
54e0ef9cf7
Adding archdefs and bba PODs
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00