Commit Graph

186 Commits

Author SHA1 Message Date
Clifford Wolf
5500cf3aff Add ice40 wire attributes (grid position, segment list)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-18 14:14:27 +02:00
Miodrag Milanovic
93a0d24560 Use settings for placer1 and router1 2018-08-09 18:39:10 +02:00
Clifford Wolf
f6189e4677 Merge branch 'master' of github.com:YosysHQ/nextpnr into constids 2018-08-08 19:35:13 +02:00
David Shah
751335977f ice40: Add error for unknown cell type when getting timing info
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-08 18:07:34 +02:00
Clifford Wolf
f875a37467 Get rid of old iCE40 id_ Arch members
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-08 17:17:16 +02:00
David Shah
433ad6462e Arch API: Removing Arch::isIOCell
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-08 17:06:59 +02:00
Clifford Wolf
e03ae50e21 Get rid of PortPin and BelType (ice40, generic, docs)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-08 17:01:18 +02:00
David Shah
e6eb203868 ice40: Add timing arcs through global buffers
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-08 16:34:41 +02:00
David Shah
d173ddba36 timing: Debugging implementation of new timing API
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-08 15:15:21 +02:00
David Shah
787fe5661c ice40: Timing arch fix
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-08 15:00:39 +02:00
David Shah
d8b3830031 timing: Update to new use API (currently broken)
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-08 14:58:43 +02:00
David Shah
bf42e525cb Arch API: New specification for timing port classes
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-08 14:37:59 +02:00
Eddie Hung
f44a5fb904 clangformat 2018-08-06 17:35:23 -07:00
Eddie Hung
1b9a664bb1 Merge branch 'master' into assign_budget_speedup 2018-08-06 12:30:24 -07:00
Eddie Hung
9addcac09c ice40's getBudgetOverride() to return correct delay for different devices 2018-08-06 12:22:13 -07:00
Eddie Hung
21cd1d7dd6 Add new Arch::isIOCell() API function 2018-08-06 12:11:47 -07:00
Eddie Hung
0f3459dbe5 Fix ice40's getBudgetOverride() to override only for COUT -> CIN 2018-08-06 08:22:08 -07:00
Eddie Hung
823ceaacbf Change getBudgetOverride() signature to return bool and modify budget in place 2018-08-06 07:56:28 -07:00
Clifford Wolf
5e53075990 API change: Use CellInfo* and NetInfo* as cell/net handles (common, ice40)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-05 15:25:42 +02:00
Clifford Wolf
287fe7e894 clangformat 2018-08-05 14:18:34 +02:00
Clifford Wolf
f6b3333a7d Add new iCE40 delay estimator and delay predictor
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-04 19:50:49 +02:00
Clifford Wolf
31fe52581b Add generation of models to tmfuzz
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-04 16:54:12 +02:00
Clifford Wolf
bd36cc1275 Refactor ice40 timing fuzzer used to create delay estimates
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-04 13:41:42 +02:00
Clifford Wolf
96291f17aa Merge branch 'master' of github.com:YosysHQ/nextpnr into lutperm 2018-08-04 10:32:07 +02:00
David Shah
082b8bf272 clangformat
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-04 08:18:04 +02:00
Clifford Wolf
8d372b86f3 Proper ice40 wire types
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-03 21:11:12 +02:00
David Shah
b937e6defe Add constraint weight as a command line option
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-03 18:31:54 +02:00
Clifford Wolf
2a1d54389f Add iCE40 pseudo-pips for lut permutation
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-03 17:37:59 +02:00
David Shah
a7269a685e ice40: Use real cell timings
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-02 16:02:51 +02:00
Clifford Wolf
6ccf8629b5 Add Router1Cfg
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-02 13:58:23 +02:00
Clifford Wolf
29dd98420b Remove getFrameDecal() API
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-01 11:30:11 +02:00
Eddie Hung
92ec2cd138 clangformat for stuff I've touched 2018-07-31 20:57:36 -07:00
Eddie Hung
f646ec790a Modify the getNetinfo*() functions and getBudgetOverride() to not use
user_idx and to take a PortRef& instead
2018-07-31 19:31:54 -07:00
Eddie Hung
2d75053744 Merge remote-tracking branch 'origin/estdelay' into redist_slack
Conflicts:
	ecp5/arch.cc
	generic/arch.cc
	ice40/arch.cc
2018-07-31 16:18:08 -07:00
Eddie Hung
70747b9355 Merge branch 'redist_slack' into 'redist_slack'
# Conflicts:
#   common/timing.cc
2018-07-31 17:51:56 +00:00
Clifford Wolf
41726087b7 getChipName() should be const
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-31 17:01:38 +02:00
Clifford Wolf
32ff0059fe Add binary search to getBelPinWire() and getBelPinType()
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-31 11:55:25 +02:00
Eddie Hung
a82f6f4105 Modify predictDelay signature 2018-07-30 21:51:30 -07:00
David Shah
b09183db3b Use DelayInfo for cell timing instead of delay_t
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-30 16:59:30 +02:00
Clifford Wolf
8f9b031ef0 Add iCE40 fast/slow delay fields to chipdb
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-30 16:21:20 +02:00
Clifford Wolf
0daffec2a0 Add predictDelay Arch API
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-30 15:35:40 +02:00
Eddie Hung
beabb429b0 clangformat 2018-07-28 14:11:43 -07:00
Eddie Hung
02b3bda7f6 ice40 estimateDelay to account for out/in muxes 2018-07-27 19:52:45 -07:00
Eddie Hung
cd561b4316 getBudgetOverride() now handles COUT crossing tiles 2018-07-26 22:30:15 -07:00
Eddie Hung
97e546041e Revert "Remove Arch::getBudgetOverride()"
This reverts commit 749dae4ae5.
2018-07-26 21:37:19 -07:00
Sergiusz Bazanski
c37d2baaf6 common: rename GraphicElement::{style,type} enums, add _MAX members 2018-07-26 16:39:19 +01:00
Clifford Wolf
03f92948d1 clangformat and GraphicElement::style comments
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-26 17:14:56 +02:00
Clifford Wolf
6a59b8522c Move iCE40 switchbox gfx to UI groups
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-26 16:21:01 +02:00
Eddie Hung
879f0d7c57 Reduce id() lookups for commonly used update_budget() 2018-07-24 21:21:11 -07:00
Sergiusz Bazanski
b31e95f82c Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/pll 2018-07-24 15:54:03 +01:00
David Shah
974ca143e8 Remove implementations of deprecated APIs
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-24 16:09:29 +02:00
David Shah
7858663aa7 timing: Model clock to Q times
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-24 11:46:14 +02:00
Sergiusz Bazanski
065ea95eab ice40: Move spliceLUT back to pack.cc 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski
e6c7b14465 ice40: Refactor PLL/LOCK LUT splicing out into Arch:: 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski
2b1f7875bb ice40: Implement emitting PLLs 2018-07-24 02:38:10 +01:00
Clifford Wolf
e13fc7edab Add Arch::getBelPins() to generic and iCE40 archs
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-22 12:08:52 +02:00
Clifford Wolf
b60c9485d2 Add Arch::getBelPinType() and Arch::getWireBelPins() in iCE40 arch
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-22 11:56:51 +02:00
Clifford Wolf
62b66e0208 Rename getWireBelPin to getBelPinWire
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-22 10:59:21 +02:00
Clifford Wolf
1e96999863 clangformat
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-22 00:50:49 +02:00
Clifford Wolf
9e6deed3b8 Merge branch 'q3k/lock-2-electric-boogaloo' into 'master'
Basic locking and threading for Arch/GUI

See merge request SymbioticEDA/nextpnr!10
2018-07-21 19:45:24 +00:00
Clifford Wolf
30e2f0e1e8 Add Loc constructors
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-21 21:40:06 +02:00
Sergiusz Bazanski
6588aafdb8 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/lock-2-electric-boogaloo 2018-07-21 20:00:42 +01:00
Sergiusz Bazanski
be14e161ae Re-enable drawing Pips. 2018-07-20 18:35:42 +01:00
Sergiusz Bazanski
5d0dbe9db9 clang-format 2018-07-20 18:24:34 +01:00
Sergiusz Bazanski
76e5236fb3 Nuke IdStringDB 2018-07-20 18:24:16 +01:00
Clifford Wolf
fd8239e170 Add Location APIs to generic arch
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-20 18:09:22 +02:00
Clifford Wolf
f6fa0300ae Improve iCE40 and common Loc code
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-20 17:33:57 +02:00
Sergiusz Bazanski
55d5f8f248 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/lock-2-electric-boogaloo 2018-07-20 10:59:33 +01:00
David Shah
3bad9c26cf ice40: Optimise reset/enable net checking
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-20 11:36:32 +02:00
David Shah
6c38df7295 ice40: Adding cell definition for DSPs
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-19 13:22:46 +02:00
David Shah
08ceb8a059 ice40: Renaming
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-18 14:34:32 +02:00
David Shah
d392b5f635 ice40: Use xArchArgs in validity check
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-18 12:51:07 +02:00
David Shah
70cfa7a6a4 ice40: Make assignArchArgs a Arch method; call also after legaliser
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-18 12:21:02 +02:00
David Shah
c75a924c3f ice40: Assign ArchArgs after packing
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-18 12:12:05 +02:00
Serge Bazanski
f3c6c76fff Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/lock-2-electric-boogaloo 2018-07-15 21:57:42 +01:00
Clifford Wolf
5531546d6b Remove pip names from ice40 chip db to safe memory
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-15 21:41:34 +02:00
Clifford Wolf
164bd28348 Add iCE40 Pip gfx
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-15 20:29:32 +02:00
Serge Bazanski
59a790cd00 Refactor IdString functionality into IdStringDB
This lets us more precisely control the lifetime of IdString databases
in contexts/arches.
2018-07-14 20:24:20 +01:00
Sergiusz Bazanski
d327a0afbb Revert "Make ice40::Arch thread-safe"
This reverts commit 0816f447b7.
2018-07-14 19:01:33 +01:00
Sergiusz Bazanski
57f75385b0 Revert "Make PnR use Unlocked methods"
This reverts commit 9e4f97290a.
2018-07-14 18:53:08 +01:00
Sergiusz Bazanski
447ed83638 Revert "Introduce proxies for locked access to ctx"
This reverts commit 89809a8b81.
2018-07-14 18:52:56 +01:00
Sergiusz Bazanski
89b9d6bc8a Revert "Slight simplification of proxy code"
This reverts commit a71b576de6.
2018-07-14 18:50:54 +01:00
Sergiusz Bazanski
36b4e3382d Revert "Make GUI nice and smooth."
This reverts commit a8c84e90a3.
2018-07-14 18:50:50 +01:00
Sergiusz Bazanski
b0c05c7f75 Revert "Refactor proxies to nextpnr."
This reverts commit 9b17fe385c.
2018-07-14 18:50:37 +01:00
Sergiusz Bazanski
d9c3c117a3 Revert "clang-format"
This reverts commit 8ca7a6da25.
2018-07-14 18:50:34 +01:00
Sergiusz Bazanski
2233040201 Revert "Remove legacy access to state via Arch"
This reverts commit 18b4b31678.
2018-07-14 18:50:15 +01:00
Sergiusz Bazanski
18b4b31678 Remove legacy access to state via Arch 2018-07-14 12:02:28 +01:00
Sergiusz Bazanski
8ca7a6da25 clang-format 2018-07-14 11:10:59 +01:00
Sergiusz Bazanski
9b17fe385c Refactor proxies to nextpnr. 2018-07-14 11:10:31 +01:00
Sergiusz Bazanski
a8c84e90a3 Make GUI nice and smooth. 2018-07-13 20:53:52 +01:00
Sergiusz Bazanski
a71b576de6 Slight simplification of proxy code 2018-07-13 19:45:35 +01:00
Sergiusz Bazanski
b8ca1a5582 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/lock-the-things 2018-07-13 19:10:27 +01:00
Sergiusz Bazanski
89809a8b81 Introduce proxies for locked access to ctx 2018-07-13 18:58:59 +01:00
Clifford Wolf
013cfebcc5 Improve handling of iCE40 BRAM bels
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-13 16:22:28 +02:00
Sergiusz Bazanski
9e4f97290a Make PnR use Unlocked methods 2018-07-13 14:50:58 +01:00
Clifford Wolf
45462ef3a7 Fix Ui/Decal handling of active/inactive arch objects
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-13 14:29:03 +02:00
Sergiusz Bazanski
0816f447b7 Make ice40::Arch thread-safe
We move all non-chip data to be private and guard them with an R/W
mutex.

We then modify all calls that access these fields to lock/shared_lock
the mutex as required.

Profiling the code before and after is an exercise left to the reader
:).
2018-07-13 12:35:39 +01:00
Clifford Wolf
b8a42ff53b Updates from clang-format
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-12 22:04:13 +02:00
Clifford Wolf
4f87ea0eb6 Improve iCE40 wire database and gfx
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-12 21:05:09 +02:00
Clifford Wolf
a436035424 Add Groups API
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-12 17:22:29 +02:00