Commit Graph

31 Commits

Author SHA1 Message Date
Keith Rothman
40df4f4f65 Add initial constant network support to FPGA interchange arch.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-23 14:09:27 -08:00
gatecat
7922b3bfc4 Replace DelayInfo with DelayPair/DelayQuad
This replaces the arch-specific DelayInfo structure with new DelayPair
(min/max only) and DelayQuad (min/max for both rise and fall) structures
that form part of common code.

This further reduces the amount of arch-specific code; and also provides
useful data structures for timing analysis which will need to delay
with pairs/quads of delays as it is improved.

While there may be a small performance cost to arches that didn't
separate the rise/fall cases (arches that aren't currently separating
the min/max cases just need to be fixed...) in DelayInfo, my expectation
is that inlining will mean this doesn't make much difference.

Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-19 11:31:33 +00:00
Keith Rothman
4766e889c0 Add some utility methods for site instance access.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-18 13:26:52 -08:00
Keith Rothman
558a753d3d Refactor "get only from iterator" to a utility.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-17 12:03:17 -08:00
Keith Rothman
f9bd692f75 Change how package pin IO sites are selected.
The first site type that matches is now selected, under the premise that
the early site types are more general.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-17 12:03:16 -08:00
Keith Rothman
7c1544f4d8 Continue fixes.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-17 12:03:16 -08:00
Keith Rothman
c385321248 Add initial site router.
This site router likely cannot handle the full problem space.  It may
need to be replaced with a more generalize approach as testing
continues.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-17 12:03:16 -08:00
Keith Rothman
a7421399f7 Working on standing up initial constraints system.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-17 12:03:16 -08:00
gatecat
399c24c805 clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-17 10:45:23 +00:00
Keith Rothman
26a187e5eb Require --package when arch BBA contains multiple packages.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-16 14:00:01 -08:00
Keith Rothman
bb4fa7af5b [FPGA Interchange] Add Cell -> BEL Pin maps.
This also expands the FPGA interchange Arch BBA to include placement
constraints, but doesn't implement them yet.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-16 09:37:19 -08:00
Keith Rothman
664407089b Add FPGA interchange frontend and backend.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-15 09:54:58 -08:00
Keith Rothman
82ab3c1aad Run "make clangformat".
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-12 10:31:05 -08:00
Keith Rothman
c96d0f225c Refactor XDC parser into a little class for testing purposes.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-12 10:31:04 -08:00
Keith Rothman
a0bd313139 Add FPGA interchange XDC parser.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-12 10:31:04 -08:00
D. Shah
9deb9e6e85 interchange: Base on ArchAPI
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-08 10:41:03 +00:00
Keith Rothman
a0ee42833b Add RelSlice::ssize and use it when comparing with signed ints.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-05 10:12:13 -08:00
Keith Rothman
9557047e5e Move all string data into BBA file.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-05 09:22:55 -08:00
Keith Rothman
ca32e935a6 Use RelSlice instead of RelPtr in cases where sizes are present.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:34 -08:00
Keith Rothman
f1ee2fde58 Update APIs to conform to style guide.
- Change non-Arch methods to snake_case
 - Adds some utility functions to for accessing bel_data.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:34 -08:00
Keith Rothman
22c3c9c303 Update copywrite headers.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
d8fa9d7f36 Fix warnings with signed/unsigned.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
0b911e484c Run "make clangformat".
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
78737ab01d Update FPGA interchange to use IdStringList.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
4a62c8c2eb Start adding data for placement constraint solving.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
cd41c4001e Add initial updates to FPGA interchange arch for BEL buckets.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
67dc19bb57 Address review comments.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
5a89dc58e1 Fix BBA import bugs.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
1dd24f6461 Assorted fixes to new FPGA interchange based arch.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:33 -08:00
Keith Rothman
6e68e8f097 Initial compiling version.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:32 -08:00
Keith Rothman
561b519716 Initial FPGA interchange (which is just a cut-down xilinx arch).
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:32 -08:00