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150 Commits 22 Branches 7 Tags 17 MiB
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87 Commits

Author SHA1 Message Date
Clifford Wolf
a139654980 Add IdString API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 15:08:01 +02:00
David Shah
592a627e0c Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-12 14:43:56 +02:00
David Shah
5a9ff4aea1 ice40: Testing the placement validity check 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 14:39:49 +02:00
Clifford Wolf
c8b815361e Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-12 14:33:13 +02:00
Clifford Wolf
426fb75bb5 Fix NEXTPNR_NAMESPACE 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 14:31:26 +02:00
David Shah
95fb0595a5 ice40: Debugging and fixing FF configuration 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 14:27:04 +02:00
Clifford Wolf
d62e341d5a Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-12 14:25:12 +02:00
Clifford Wolf
391d49c13e Add nextpnr namespace 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 14:24:59 +02:00
David Shah
9ee6a6e114 ice40: Creating packer tests 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 14:19:26 +02:00
David Shah
47eeda40bc Implement the placement validity checker 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 13:45:59 +02:00
David Shah
031d8e811f ice40: Adding a placement validity checker 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 13:40:22 +02:00
David Shah
67a5cedbe3 ice40: Pack constants to LCs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 13:09:36 +02:00
David Shah
f72807f790 ice40: Debugging the packer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 12:46:30 +02:00
David Shah
2f61a9b98a ice40: Start working on a packer, currently not tested 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 12:13:11 +02:00
David Shah
5f813410aa ice40: Adding cell utilities for packing 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 11:49:54 +02:00
David Shah
19aefe374c ice40: Optimising chipdb builds 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 10:39:33 +02:00
Clifford Wolf
be73894bea Add "nextpnr.h" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 20:12:57 +02:00
Clifford Wolf
ac67482380 Remove pool, dict, vector namespace aliases 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 19:56:33 +02:00
Clifford Wolf
f63eec034f Add conflicting=false argument to bind getters 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 19:46:03 +02:00
Miodrag Milanovic
b4b5586efd Fixed portability issue, now it works on msys2 windows build as well 2018-06-11 09:33:42 +02:00
Miodrag Milanovic
67227847e5 Pass design to gui, display chip name 2018-06-10 18:25:23 +02:00
David Shah
d3f1112580 Improving 5k support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 17:20:29 +02:00
Clifford Wolf
458a13456a Fix iCE40 routing graph 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 17:08:14 +02:00
Clifford Wolf
602e6fab1e Add support for iCE40 global buffers (currently only for 1k devices) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 16:31:06 +02:00
David Shah
02b83d6db6 Debugging on icebreaker 2018-06-10 15:06:26 +02:00
Clifford Wolf
032c94d094 Add blinky post-synthesis testbench 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 14:31:38 +02:00
Clifford Wolf
4a79e70470 Fix ice40 pip/switch locked performance issue 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 14:08:00 +02:00
David Shah
8d5da98122 ice40: Set config bits for unused IO 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 13:38:34 +02:00
David Shah
4e6d6e632f ice40: Fix techmap 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 13:33:47 +02:00
David Shah
30e672313d ice40: Add IO config to bitstream 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 13:24:48 +02:00
David Shah
d0bd657551 ice40: Write logic cell config to bitstream 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 12:58:05 +02:00
David Shah
6da8f98eac ice40: Lock out mutually exclusive pips 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 12:17:55 +02:00
David Shah
827a43c88c ice40: Start adding routing to asc output 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 12:11:58 +02:00
David Shah
d0431225f1 ice40: Writing an empty ASC file 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 11:56:07 +02:00
David Shah
89d5280bf6 ice40: Adding non-routing config bits to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 11:14:50 +02:00
David Shah
48b72126c9 ice40: Add switch data to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 10:54:55 +02:00
Clifford Wolf
70f322ab44 Renamed LOC attribute to BEL, fix ice40 IO bel names 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 19:52:22 +02:00
David Shah
72f5e640af Adding basic placement constraints 
Specify the attribute (* LOC="bel_name" *) on any cell to constrain its
placement to that bel.

Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-09 19:38:37 +02:00
Clifford Wolf
8cabb39d6d Getting rid of .nil() methods, compare with zero- and default-constructed objects instead 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 18:41:38 +02:00
Clifford Wolf
dfbfbf87db Add very basic router 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 18:19:20 +02:00
David Shah
c16a971c0f python: Fixing builds as importable module 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-08 11:17:04 +02:00
David Shah
7f330af9f3 Reformat remaining files 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-08 11:04:02 +02:00
ZipCPU
4499864024 Applied clang-format to my own contributions 2018-06-07 15:38:24 -04:00
ZipCPU
c13c15bada Set the default log to stdout 2018-06-07 09:52:32 -04:00
ZipCPU
c352f6536b Moved placer definitions to place.h, main automatically runs placer now 2018-06-07 09:49:21 -04:00
ZipCPU
f32b9622d5 Initial (random) placer capability 
This commit also includes changes to jsonparse to allow it to
1) recognize ports with no connection, and set their net pointers to NULL
2) recognize designs with a ports node rather than a ports_direction

The rule checker has also been modified to accommodate possible NULL netlists

The ice40 chip now also has iterator operations ++bi and bi++.
 2018-06-07 09:38:14 -04:00
David Shah
1d39924c14 ice40: More Python bindings and examples 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 15:04:07 +02:00
David Shah
547d4fe3ee ice40: Refactor PortPin and add Python binding 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 14:36:35 +02:00
ZipCPU
efd8722fd9 Connected the log file facility to stderr 2018-06-07 08:12:22 -04:00
ZipCPU
0dbfa4662f Preliminary placer changes to main 2018-06-07 07:52:05 -04:00