Keith Rothman
e60dda57f3
Add libcapnp-dev for FPGA interchange compilation support.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-15 09:54:58 -08:00
gatecat
9c9a02628d
ci: Bump prjtrellis version
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Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-12 11:51:21 +00:00
D. Shah
f501ba0c77
Update prjoxide URL
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Signed-off-by: D. Shah <gatecat@ds0.me>
2021-02-08 13:04:49 +00:00
David Shah
b671d8f59d
Merge pull request #553 from YosysHQ/rel-slice
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Switch from RelPtr to RelSlice
2021-01-28 12:53:03 +00:00
D. Shah
e049d5f2fc
nexus: Switch from RelPtr to RelSlice
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This replaces RelPtrs and a separate length field with a Rust-style
slice containing both a pointer and a length; with bounds checking
always enforced.
Thus iterating over these structures is both cleaner and safer.
Signed-off-by: D. Shah <dave@ds0.me>
2021-01-27 17:24:01 +00:00
Pepijn de Vos
2700687c00
Gowin: Add GW1N-4 support
2021-01-03 19:45:00 +01:00
Pepijn de Vos
3611f54902
Gowin target ( #542 )
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* load wires
* add slice bels
* add IOB
* add aliases
* local aliases
* broken packing stuff
* working packer
* add constraints
* pnr runs1111
* add timing info
* constraints
* more constraint stuff
* add copyright
* remove generic reference
* remove parameters
* remove generic python api
* add newline to end of file
* some small refactoring
* warn on invalid constraints
* don't error on missing cell
* comment out debugging print
* typo
* avoid copy
* faster empty idstring
* remove intermediate variable
* no more deadnames
* fix cst warnings
* increase ripup and epsilon a bit
* take single device parameter
* add info to readme
* gui stubs
* Revert 4d03b681a8
2020-12-30 14:59:55 +00:00
