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823 Commits 22 Branches 7 Tags 17 MiB
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823 Commits

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Author SHA1 Message Date
Eddie Hung
926c186ec7 Add Arch::getBudgetOverride() to eliminate hack for COUT 2018-07-21 13:05:09 -07:00
Eddie Hung
e44dc25f09 Uncomment out negative slack messages during update_budget(), make verbose 2018-07-21 12:47:09 -07:00
Eddie Hung
31c9fd28fe Merge remote-tracking branch 'origin/master' into redist_slack 2018-07-21 12:27:44 -07:00
Eddie Hung
dfdeb21690 Merge branch 'master' into 'master' 
Master

See merge request eddiehung/nextpnr!6
 2018-07-21 19:04:14 +00:00
Eddie Hung
f176ee48cd Merge branch 'redist_slack' into 'redist_slack' 
Redist slack

See merge request eddiehung/nextpnr!5
 2018-07-21 19:03:35 +00:00
Eddie Hung
1f6897733b Merge branch 'redist_slack' into 'redist_slack' 
# Conflicts:
#   common/timing.cc
 2018-07-21 19:03:23 +00:00
Miodrag Milanovic
f438fc615b Added driver and users for nets 2018-07-21 20:21:48 +02:00
Clifford Wolf
39b843ecac Merge branch 'router1ng' into 'master' 
Router1ng

See merge request SymbioticEDA/nextpnr!13
 2018-07-21 17:59:44 +00:00
Miodrag Milanovic
3175891cb5 Map ports to nets 2018-07-21 19:48:00 +02:00
Clifford Wolf
c796b301d3 Bugfix in router1: Also bind src_wire 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-21 19:36:48 +02:00
David Shah
b2452f4646 HACK: set carry budgets to zero 2018-07-21 19:33:42 +02:00
Clifford Wolf
2f996e6a30 Add final sanity check in router1 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-21 17:54:47 +02:00
Miodrag Milanovic
57c63e6921 create io cells out of asc 2018-07-21 17:54:35 +02:00
Miodrag Milanovic
912a79dc33 add cells that are in default state or no configuration 2018-07-21 17:38:22 +02:00
Miodrag Milanovic
7beb4739d4 Add used cells and attach them to bels 2018-07-21 17:04:47 +02:00
Clifford Wolf
41194d934b Refactoring of router1 
- Use source-sink pairs as jobs, not whole nets
- Route nets with smallest slack first
- Preserve routes for already routed source-sink pairs
- Add small incentive for re-using wires

Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-21 17:02:53 +02:00
David Shah
80097526ee Fix placement bug with VexRiscV reported by John McMaster 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-21 16:45:46 +02:00
Miodrag Milanovic
13339c0355 Assign proper pips 2018-07-21 15:08:49 +02:00
Miodrag Milanovic
3afcd812c9 add only missing net 2018-07-21 14:41:04 +02:00
Clifford Wolf
a8eadb5ba2 Fix minor issue in GUI Wire properties 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-21 13:53:29 +02:00
Clifford Wolf
78f40ca0af Change DelayInfo semantics to what we actually need 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-21 13:52:59 +02:00
Clifford Wolf
c556242976 Add getWireDelay API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-21 13:38:44 +02:00
Miodrag Milanovic
09a68affa3 Fix warnings and status 2018-07-21 12:22:41 +02:00
Miodrag Milanovic
fe239366b5 Made save project work as well 2018-07-21 12:15:50 +02:00
David Shah
bbb140c699 Quick hack to route nets with lowest budget first 2018-07-21 11:52:41 +02:00
Miodrag Milanovic
ec4fc0f830 made open project to work 2018-07-21 11:24:29 +02:00
Eddie Hung
d23cdd6c06 Avoid hysteresis preventing placer from stopping 2018-07-21 11:19:06 +02:00
Eddie Hung
241418dc25 Add update_budget() to timing.h header 2018-07-21 11:19:06 +02:00
Eddie Hung
1cd5c9dac8 Update comment 2018-07-21 11:19:06 +02:00
Eddie Hung
3eecccc6f7 Avoid hysteresis preventing placer from stopping 2018-07-21 01:59:16 -07:00
Eddie Hung
f89115c3e3 Add update_budget() to timing.h header 2018-07-21 01:55:46 -07:00
Eddie Hung
27a79a3a4f Update comment 2018-07-21 01:55:20 -07:00
Miodrag Milanovic
20941292ad fix introduced bug 2018-07-21 09:22:09 +02:00
Miodrag Milanovic
9f0be8cd5f make new context work again 2018-07-20 19:16:36 +02:00
Miodrag Milanovic
34ec70e88b Bind wires to net 2018-07-20 18:42:27 +02:00
David Shah
0d6f6f410d Merge branch 'gridapi' into 'master' 
Gridapi

See merge request SymbioticEDA/nextpnr!11
 2018-07-20 16:27:27 +00:00
Clifford Wolf
fd8239e170 Add Location APIs to generic arch 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-20 18:09:22 +02:00
Clifford Wolf
f6fa0300ae Improve iCE40 and common Loc code 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-20 17:33:57 +02:00
Clifford Wolf
e16b4a325e Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into gridapi 2018-07-20 17:13:26 +02:00
Miodrag Milanovic
6c835d76f2 Few more checks on parameters and error eol 2018-07-20 14:06:53 +02:00
Miodrag Milanovic
53034959f3 Start adding bitstream reading for ice40 2018-07-20 13:27:21 +02:00
David Shah
3bad9c26cf ice40: Optimise reset/enable net checking 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-20 11:36:32 +02:00
Eddie Hung
6e7ba2a2be Merge branch 'master' into 'master' 
Master

See merge request eddiehung/nextpnr!4
 2018-07-19 14:57:38 +00:00
David Shah
79dc910b40 ice40: Trim DSP inputs that are constant where appropriate 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-19 14:32:30 +02:00
David Shah
bff7d673ed ice40: Packer and bitstream gen support for MAC16s 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-19 14:03:48 +02:00
David Shah
6c38df7295 ice40: Adding cell definition for DSPs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-19 13:22:46 +02:00
David Shah
0cb9ec0757 ice40: Add virtual padin wires for intoscs and GB_IOs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-19 12:04:35 +02:00
David Shah
d221e90706 Reducing performance cost of asserts 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-19 11:43:10 +02:00
David Shah
b0d9b994eb ice40: Adding data for extra cell configuration 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-19 11:14:43 +02:00
Miodrag Milanovic
2df7e130fb Fix click on wire in net section 2018-07-18 18:37:54 +02:00