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2,883 Commits 22 Branches 7 Tags 17 MiB
94e8847d67
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100 Commits

Author SHA1 Message Date
D. Shah
94e8847d67 cleanup: Spelling fixes 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-01-28 15:19:06 +00:00
D. Shah
dc46d84c35 ecp5: Fix bottom clock tile renaming for tilegroups 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-01-25 15:45:56 +00:00
David Shah
818faa78aa clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2020-12-30 16:49:55 +00:00
David Shah
5e53a18292 ecp5: Improve pseudo-diff IO error handling 
Signed-off-by: David Shah <dave@ds0.me>
 2020-12-27 20:14:49 +00:00
David Shah
06555aa003 clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2020-11-14 09:07:34 +00:00
David Shah
9916525418 ecp5: Fix handling of CLK/LSR wire attached settings 
Signed-off-by: David Shah <dave@ds0.me>
 2020-11-05 11:53:55 +00:00
David Shah
9aff6aa55c ecp5: Add support for setting PIO clamp 
Signed-off-by: David Shah <dave@ds0.me>
 2020-09-26 09:24:01 +01:00
David Shah
19a4ddf2f0 ecp5: Add SYSCONFIG settings to bitstream 
Signed-off-by: David Shah <dave@ds0.me>
 2020-07-12 14:51:14 +01:00
David Shah
ddf546c2cc clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2020-05-16 12:57:24 +01:00
Mike Walters
5b660e3432 ecp5: Allow setting drive strength for LVCMOS33D IOs 2020-05-12 14:19:37 +01:00
David Shah
de00c00aac ecp5: Fix CSDECODE bitgen 
Signed-off-by: David Shah <dave@ds0.me>
 2020-04-15 20:25:56 +01:00
David Shah
a8111bba83 ecp5: Fix routing bitgen for non-SERDES 'VCIB' tiles 
Signed-off-by: David Shah <dave@ds0.me>
 2020-04-10 08:25:16 +01:00
David Shah
ced336492c ecp5: Make hysteresis default-on for LVCMOS33 bidir as well as input 
Signed-off-by: David Shah <dave@ds0.me>
 2020-04-09 21:36:27 +01:00
Gary Wong
31e9fffadd Handle OPENDRAIN attribute. 2020-04-03 17:59:19 -06:00
Martin
707289c8d6 Enum/int compatibility for EHXPLLL parameters 
- Lattice component EHXPLLL parameter compatibility, allowing to
  pass an int parameter for the enum (as expected by trellis tile)
  e.g. CLKOP_TRIM_DELAY : integer := 0;
 2020-04-02 14:25:00 +02:00
David Shah
3b49c20f43 ecp5: Proper support for '12k' device 
Signed-off-by: David Shah <dave@ds0.me>
 2020-03-13 11:22:11 +00:00
David Shah
751f4556fd ecp5: Fix differential inputs 
Signed-off-by: David Shah <dave@ds0.me>
 2020-03-08 11:32:34 +00:00
David Shah
7c81d4e630 ecp5: Add SPICB0 IO support 
Signed-off-by: David Shah <dave@ds0.me>
 2020-01-20 20:30:14 +00:00
David Shah
f513d5fff4 ecp5: Add support for top pseudo diff outputs 
Signed-off-by: David Shah <dave@ds0.me>
 2020-01-15 11:43:12 +00:00
David Shah
349be76d26 ecp5: Add support for flipflops with preload 
Signed-off-by: David Shah <dave@ds0.me>
 2019-12-07 12:20:25 +00:00
David Shah
1c1c096861 ecp5: Fix 25k DDRDLLA bitstream gen 
Signed-off-by: David Shah <dave@ds0.me>
 2019-11-29 10:56:04 +00:00
David Shah
36c0ff2dbc ecp5: Fix dynamic DELAYF control 
Signed-off-by: David Shah <dave@ds0.me>
 2019-11-18 20:58:08 +00:00
David Shah
5cf0ed5ede ecp5: Allow setting drive strength for 3V3 IOs 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-26 22:21:18 +01:00
David Shah
c6401413a4 ecp5: Add support for IO registers 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-09 14:23:35 +01:00
David Shah
9b83e67460 ecp5: Preparations for new IO bels 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-09 10:55:10 +01:00
David Shah
d04e5954a6 ecp5: Adding support for 36-bit wide PDP RAMs 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-01 12:01:33 +01:00
David Shah
04be9a71f9 ecp5: Add support for clock gating with DCCA 
Signed-off-by: David Shah <dave@ds0.me>
 2019-08-31 10:45:12 +01:00
David Shah
9f9920f92b ecp5: Add full part name to bitstream header 
Signed-off-by: David Shah <dave@ds0.me>
 2019-08-27 14:36:20 +01:00
David Shah
78f86ce67a ecp5: Add GSR/SGSR support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-08-27 13:14:41 +01:00
David Shah
661237eb64 ecp5: Add --out-of-context for building hard macros 
Signed-off-by: David Shah <dave@ds0.me>
 2019-08-07 14:22:47 +01:00
David Shah
ec48f8f464 ecp5: New Property interface 
Signed-off-by: David Shah <dave@ds0.me>
 2019-08-05 17:22:37 +01:00
David Shah
187db92b05 ecp5: Improve error message for bad chars in BRAM init strings 
Signed-off-by: David Shah <dave@ds0.me>
 2019-06-08 10:52:37 +01:00
David Shah
ae6c1170ef ecp5: Derived constraint support for PLLs, clock dividers and oscillators 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-02-24 10:28:25 +01:00
David Shah
e50ab2106f ecp5: Fixes for litedram 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-02-24 10:28:25 +01:00
David Shah
3b50b57f05 ecp5: Add DIFFRESISTOR support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-02-24 10:28:25 +01:00
David Shah
f960139768 ecp5: Add support for referenced inputs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-02-24 10:28:25 +01:00
David Shah
817ba5a4b9 ecp5: Add DELAYF/DELAYG support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-02-24 10:28:25 +01:00
David Shah
fd52db813f ecp5: Add TERMINATION support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
491d64293d ecp5: Add DDRDLLA support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
68abcb365a ecp5: Add ECLKSYNCB support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
4402361246 ecp5: Helper functions and bitstream for DQS 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
52d1954d96 ecp5: Packing of ODDRX2F 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
4c7306185e ecp5: Fix typo 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-14 12:31:33 +00:00
David Shah
882775acef ecp5: Embed baseconfig 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-08 13:44:15 +00:00
David Shah
e929d221f3 ecp5: Adding DTR, OSCG, CLKDIVF, USRMCLK, JTAGG 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-08 12:34:22 +00:00
David Shah
747380537f ecp5: Add PULLMODE support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-01-07 14:27:58 +00:00
David Shah
c01bb88509 ecp5: Add IOLOGIC timing and bitstream; ODDR working 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-14 16:40:38 +00:00
David Shah
5a1190ade2 ecp5: Fix UR PLL tile coordinates 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-26 15:35:55 +00:00
David Shah
9c52afcf5f clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:25:51 +00:00
David Shah
cfaa6c0e5d
Merge pull request #119 from cr1901/win-fix 
nextpnr-ecp5 Windows Fixes
 2018-11-16 10:00:13 +00:00