Commit Graph

3485 Commits

Author SHA1 Message Date
gatecat
96f16c8635 mistral: Add a basic QSF parser
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
595b354184 mistral: Add some packing logic based on nexus
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
3fc5396063 mistral: Working on FF validity checking
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
1b729d90d0 mistral: Add the 'pin style' stuff based on Nexus
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
d38ff14264 mistral: Working on ALM input assignment
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
e5e2f7bc62 mistral: Add stub pack/place/route functions
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
879ac39e53 mistral: Renamed arch from cyclonev
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
2938682295 cyclonev: Rebase update
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
9eb0bc482e cyclonev: More validity checking thoughts
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
a6ea72fd84 cyclonev: Add validity check and IO bels
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
fbdcfa9c42 cyclonev: First (untested) pass at ALM validity checking
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
1cd22b81da cyclonev: More preparations for validity checking
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
9bd7ef5f5f cyclonev: Preparations for validity checking
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
24af19b58d cyclonev: Fix some archcheck fails
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
431c4cec9f cyclonev: Rework bels
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
86ce6abf6a cyclonev: Outline LAB structure
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
c671961c18 cyclonev: Outline functions for creating bels/wires/pips
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
b1d3eb07c3 archcheck: Use old connectivity check for CycloneV
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
8677d59b92 cyclonev: Add routing graph
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
5d1b8bf744 cyclonev: Add names and archcheck fixes
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
af0bffbae9 cyclonev: Add some range types
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
c3cb9aa3f6 cyclonev: Add enough stubs that it links
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
9901a5fafc cyclonev: Add wire and pip types
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
7e57196cf9 cyclonev: Add some useful constids
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
0533818cee cyclonev: Update in line with nextpnr changes
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
Dan Ravensloft
9f2cbe1762 build bel list in constructor 2021-05-15 14:54:33 +01:00
Dan Ravensloft
170d6cffdd current progress 2021-05-15 14:54:33 +01:00
Dan Ravensloft
fcdf1e0bfd bind/unbind bel 2021-05-15 14:54:33 +01:00
Dan Ravensloft
189164e7c8 Resolve feedback 2021-05-15 14:54:33 +01:00
Dan Ravensloft
b8f58d558c couple of functions implemented 2021-05-15 14:54:31 +01:00
Dan Ravensloft
6ffbb9ed87 cyclonev: basic platform 2021-05-15 14:52:19 +01:00
gatecat
1b5767928d
Merge pull request #706 from acomodi/fix-illegal-site-thru
interchange: pseudo pips: fix illegal tile pseudo PIPs
2021-05-14 12:34:32 +01:00
Alessandro Comodi
428b56570d interchange: pseudo pips: fix illegal tile pseudo PIPs
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-05-14 12:17:53 +02:00
gatecat
21d594a150
Merge pull request #700 from acomodi/fix-illegal-site-thru
interchange: arch: do not allow site pips within sites
2021-05-13 11:02:15 +01:00
Alessandro Comodi
8c468acff8 interchange: site router: add valid pips list to check during routing
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-05-13 11:00:42 +02:00
Alessandro Comodi
fd93697a2d interchange: arch: do not allow site pips within sites
During general routing, the only site pips that can be allowed are those
which connect a site wire to the routing interface.

This might be too restrictive when dealing with architectures that
require more than one site PIPs to route from a driver within a site to the routing
interface (which is something that should be allowed in the
interchange).

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-05-12 18:28:22 +02:00
gatecat
ced31aa917
Merge pull request #704 from YosysHQ/router2_stats
router2: Add some boundness statistics
2021-05-12 14:11:14 +01:00
gatecat
ee60e9c71c router2: Add some boundness statistics
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-12 12:18:58 +01:00
gatecat
ea45971dcc Update README
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-11 15:40:30 +01:00
gatecat
7e3bb72049
Merge pull request #702 from YosysHQ/gatecat/interchange-fix-bb
interchange: Fix bounding box computation
2021-05-11 13:59:09 +01:00
gatecat
e9fdbf618c router2: Fix a typo
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-11 13:02:23 +01:00
gatecat
7a1a95a2d6 interchange: Fix bounding box computation
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-11 13:02:23 +01:00
gatecat
744e91dda8
Merge pull request #701 from YosysHQ/gatecat/finer-debug
command: Allow debug output for just placer or router
2021-05-11 12:21:39 +01:00
gatecat
b3b79122e1 command: Allow debug output for just placer or router
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-11 11:35:43 +01:00
gatecat
466de95312
Merge pull request #695 from acomodi/fix-illegal-site-thru
interchange: fix site-thru pip legality
2021-05-10 16:05:34 +01:00
Alessandro Comodi
45618faf36 interchange: site router: fix log messages
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-05-10 14:20:54 +02:00
Alessandro Comodi
beff2b912c interchange: site router: fix illegal site thru paths
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-05-10 14:05:46 +02:00
gatecat
432b9d8bde
Merge pull request #694 from YosysHQ/gatecat/interchange-glbroute
interchange: Initial global routing implementation
2021-05-07 11:24:08 +01:00
gatecat
51949d95c3 interchange: Bump version
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-07 10:28:59 +01:00
gatecat
9a1cad85fe interchange: Adding a basic global buffer placer
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-07 10:28:59 +01:00