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Author SHA1 Message Date
gatecat
233ea62c13
Merge pull request #941 from yrabbit/gsr 
gowin: Add the Global Set/Reset primitive
 2022-03-12 15:43:26 +00:00
YRabbit
4a2aa6deb4 gowin: Add the Global Set/Reset primitive 
GSR is added automatically if it was not instantiated by the user explicitly.

Compatible with old apicula bases, the functionality does not work, but
the crash does not happen --- just a warning.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2022-03-12 23:05:42 +10:00
Maya
9f53bd4278 ecp5: accept lowercase characters in hex strings. 2022-03-11 23:34:45 +00:00
Maya
2a3d0c1d29 ecp5: verify hex strings contain only valid characters. 2022-03-11 23:31:23 +00:00
gatecat
20e595e211
Merge pull request #939 from antmicro/fix-global-router 
[fpga_interchange] FIX: Don't hold reference to current visit in route_global_arc
 2022-03-11 15:45:25 +00:00
Krzysztof Boronski
8c0dbdb218 interchange: Don't hold reference to visit in global routing 
Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com>
 2022-03-11 07:53:42 -06:00
gatecat
1911a9523c
Merge pull request #886 from Ravenslofty/mistral-m10k 
mistral: M10K support
 2022-03-09 18:03:59 +00:00
Lofty
3e688a3ac9 mistral: fixes and debug info 2022-03-09 17:13:54 +00:00
Lofty
9be65cd67c mistral: some more M10K fixes 2022-03-09 17:13:54 +00:00
gatecat
da65afc83b mistral: M10K pack fixes 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-03-09 17:13:54 +00:00
Lofty
78474a5dec mistral: preliminary bitstream info 2022-03-09 17:13:54 +00:00
Lofty
34b7cdb533 mistral: move M10K code to pack 2022-03-09 17:13:54 +00:00
Lofty
33e031a284 mistral: M10K cell function 2022-03-09 17:13:54 +00:00
Lofty
af6735bdf4 mistral: add M10K bel 2022-03-09 17:13:54 +00:00
gatecat
df7e26c1aa clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-03-09 17:12:59 +00:00
gatecat
5ff701d45e
Merge pull request #937 from antmicro/mdudek/nexus_implicit_DCC_cascading 
nexus: DCCs cannot be cascaded
 2022-03-09 14:29:17 +00:00
Maciej Dudek
191be632e2 nexus: DCCs cannot be cascaded 
This commit solves implicit cascading when clock signal drives DCC and logic

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
 2022-03-09 14:13:29 +01:00
gatecat
1af997a074
Merge pull request #936 from whitequark/wasm-no-parallel-refine 
Add missing part of PR #933
 2022-03-08 18:47:00 +00:00
Catherine
626eccdb89 Add missing part of commit aee35768. 2022-03-08 17:24:29 +00:00
gatecat
81e970867d
Merge pull request #933 from whitequark/wasm-no-parallel-refine 
Disable parallel refinement on WebAssembly
 2022-03-05 20:00:38 +00:00
Catherine
aee35768f4 Disable parallel refinement on WebAssembly. 2022-03-05 16:32:44 +00:00
gatecat
285325ad5b
Merge pull request #932 from antmicro/remove-hardcoded-values-from-lut-mapping-cache 
interchange: lut map cache: remove hardcoded values
 2022-03-04 18:17:08 +00:00
gatecat
2c8062bdb3
Merge pull request #931 from yrabbit/bugfix-0 
gowin: BUGFIX gui crash
 2022-03-04 16:06:41 +00:00
Alessandro Comodi
b5d6fc8ed7 interchange: lut map cache: remove hardcoded values 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2022-03-04 16:53:24 +01:00
YRabbit
c93a3f35ac gowin: BUGFIX gui crash 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2022-03-04 16:19:16 +10:00
gatecat
2c6ca4836f
Merge pull request #929 from gatecat/gatecat/parallel_refine 
parallel_refine: New, parallelised placement refinement pass
 2022-03-03 21:53:26 +00:00
gatecat
cc9f99a80c parallel_refine: New, parallelised placement refinement pass 2022-03-03 18:37:53 +00:00
gatecat
0a70b9c992
Merge pull request #925 from YosysHQ/gatecat/netlist-iv 
Switch to potentially-sparse net users array
 2022-03-01 16:38:48 +00:00
gatecat
d8bea3ccfc
Merge pull request #927 from YosysHQ/gatecat/ecp5-pdpw-fix 
ecp5: Fix PDPW16K clock param renaming
 2022-02-28 14:17:38 +00:00
gatecat
9b3e687eda ecp5: Fix PDPW16K clock param renaming 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-28 13:10:00 +00:00
gatecat
86699b42f6 Switch to potentially-sparse net users array 
This uses a new data structure for net.users that allows gaps, so
removing a port from a net is no longer an O(n) operation on the number
of users the net has.

Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-27 13:47:05 +00:00
gatecat
434a9737bb Add indexed_store container type 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-26 15:11:33 +00:00
gatecat
0b4f1e2b51
Merge pull request #924 from Ravenslofty/okami 
okami: new Viaduct arch
 2022-02-25 12:48:56 +00:00
Lofty
fbb02e2860 okami: new Viaduct arch 2022-02-24 20:38:56 +00:00
gatecat
33ca747b1f
Merge pull request #923 from yrabbit/partnumber-re 
gowin: recognize partnumbers of GW1NZ-1
 2022-02-24 11:13:39 +00:00
YRabbit
3894a36ddb gowin: recognize partnumbers of GW1NZ-1 
The model should be recognized by the partnumber, --family is needed
only if the same partnumbers belong to different models.
This is done in order to automatically generate parameters for calling
nextpnr from Gowin files without problems: there also only partnumber is
used and only in some cases the model is specified with the -name
parameter and GW1NZ-1 is not such a case.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2022-02-24 13:35:22 +10:00
gatecat
440d7e394e
Merge pull request #922 from yrabbit/wip-0-lvds 
gowin: Add support for true differential output
 2022-02-23 11:58:39 +00:00
YRabbit
ad49b7c78d gowin: Add support for true differential output 
The new primitive appears as an amalgamation of two existing OBUF
primitives.  Compatible with older versions of apicula, although, of
course, using TLVDS_OBUF with old databases will not bring the desired
result, but no crash.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2022-02-23 15:53:04 +10:00
gatecat
4666ea7051
Merge pull request #921 from YosysHQ/gatecat/concat-overrides 
Add IdStringList::concat overrides taking IdString
 2022-02-20 19:33:16 +00:00
gatecat
4812f9707a
Merge pull request #913 from chiplet/gw1nz-1 
gowin: Add GW1NZ-1 support
 2022-02-20 18:27:36 +00:00
gatecat
75c45dbef1 Add IdStringList::concat overrides taking IdString 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-20 18:26:17 +00:00
gatecat
347ba3afb3
Merge pull request #919 from YosysHQ/gatecat/netlist-iii 
refactor: New member functions to replace design_utils
 2022-02-18 12:07:49 +00:00
gatecat
6a32aca4ac refactor: New member functions to replace design_utils 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-18 11:13:18 +00:00
gatecat
61d1db16be
Merge pull request #918 from YosysHQ/gatecat/netlist-ii 
Refactor pt2, barnacle cleanup
 2022-02-16 18:13:22 +00:00
gatecat
76683a1e3c refactor: Use constids instead of id("..") 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-16 17:09:54 +00:00
gatecat
9ef0bc3d3a refactor: Use cell member functions to add ports 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-16 16:45:45 +00:00
gatecat
25c47e5b7e
Merge pull request #917 from YosysHQ/gatecat/netlist-i 
refactor: New NetInfo and CellInfo constructors
 2022-02-16 16:15:26 +00:00
gatecat
30fd86ce69 refactor: New NetInfo and CellInfo constructors 2022-02-16 15:10:57 +00:00
gatecat
02e6d2dbca mistral: Fix 'not handled in switch' compiler warning 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-16 13:39:57 +00:00
gatecat
f3ee0d51a9 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-16 13:32:53 +00:00