gatecat
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3bb94192d5
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mistral: Tidying up
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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b1e1492dac
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mistral: Make router2 the default
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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7fbfd98b8a
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mistral: Speed up bel binding and checking
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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34677d3883
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mistral: Workaround for weird SCLR issue
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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9221acc9e2
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mistral: Fix ENA and ACLR bitstream generation
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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4d32c4f2fc
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mistral: Disable global buffers that are currently broken
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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e1aaf715c6
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mistral: Compensate for EF_SEL mirroring in validity check
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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87ebada258
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mistral: Fix EF_SEL and BTO_DIS
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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8bc9732d49
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mistral: PKREG bits appear to be mirrored within a half?
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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757a10c247
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mistral: Debugging flipflops
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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dce847b2f3
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mistral: Trim SDATA if SLOAD is low
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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b29fa1d24c
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mistral: FF&CLKBUF fixes, part 1
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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66b3a192f8
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mistral: First pass at FF and CLKBUF bitgen
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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b2f45b1aab
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mistral: Account for TD input count limit
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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bd525d3548
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msitral: Fix pip iterator Python bindings
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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8c7fa8e6c9
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mistral: Implement PIP locations, too
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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6ad329c540
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mistral: Implement bounding boxes for router2
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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e688ee0e89
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mistral: Debugging carry chain issues
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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3313d5267a
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mistral: Adding FF control set reservation
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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09a867310b
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mistral: Carry fixes
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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3d1bb4f1b2
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mistral: Carry debugging
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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2f2fde7e6c
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mistral: Write arith mode to bitstream (not yet functional)
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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d39e67da7e
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mistral: First pass at carry packing
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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7574eab2b6
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mistral: FF validity checking fixes
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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18e05ec852
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mistral: Fix constant trimming
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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bacba274a2
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mistral: Write LUT inits
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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d1f635242d
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mistral: Add some IO configuration
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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dea4c6f53f
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mistral: Setting some more boilerplate bits
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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27eb3be7da
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mistral: Add stub RBF generation
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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ad5e5f80ca
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mistral: Rename clock buffer primitive
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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a581526528
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mistral: Python and GUI stub
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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386b5b901c
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mistral: Implement some misc. things
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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c5d983066d
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mistral: Some preps for generating bitstreams
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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2612853238
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mistral: Adding a function for computing ALM LUT masks
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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5d191f8297
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mistral: Add IO packing
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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96f16c8635
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mistral: Add a basic QSF parser
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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595b354184
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mistral: Add some packing logic based on nexus
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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3fc5396063
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mistral: Working on FF validity checking
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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1b729d90d0
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mistral: Add the 'pin style' stuff based on Nexus
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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d38ff14264
|
mistral: Working on ALM input assignment
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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e5e2f7bc62
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mistral: Add stub pack/place/route functions
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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879ac39e53
|
mistral: Renamed arch from cyclonev
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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