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Author SHA1 Message Date
Clifford Wolf
b5d518583e Add missing router1 ctx->yield() calls 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-11-20 18:58:15 +01:00
David Shah
343569105d
Merge pull request #131 from smunaut/ice40_fixes 
iCE40: Bug fixes and general improvement of global network support
 2018-11-20 10:11:32 +00:00
David Shah
0fb7735e45
Merge pull request #130 from smunaut/issue_127 
common/placer1: In random pick, only use grid if there is more than 64 BELs
 2018-11-20 10:11:21 +00:00
David Shah
04c5ed45bb
Merge pull request #132 from maikmerten/master 
add "randomize-seed" command-line option
 2018-11-20 10:11:09 +00:00
Maik Merten
e167043e73 add "randomize-seed" command-line option 2018-11-19 19:45:12 +01:00
Sylvain Munaut
d6fd0e7e5b common/placer1: In random pick, only use grid if there is more than 64 BELs 
If you have a large grid and very few BELs of a given type, picking a
random grid location yields very little odds of finding a BEL of that
type.

So for those, just put all of them at (0,0) and do a true random pick.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:52:40 +01:00
Sylvain Munaut
e8556aff37 ice40: Add support for SB_RGBA_DRV 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
de8de6304f ice40: Add global network output support for LFOSC/HFOSC 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
271cc7be11 ice40/pack: Add helper to constain cells that are unique in the FPGA 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
519d4e2af8 ice40: Add support for SB_GB_IO 
During packing we replace them by standard SB_IO cells and create the
'fake' SB_GB that matches that IO site global buffer connection.

It's done in a separate pass because we need to make sure the nextpnr iob
have been dealt first so we have our final Bel location on the SB_IO.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
d8e4c21d96 ice40: Add support for PLL global outputs via PADIN 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
bc9f2da470 ice40: Introduce the concept of forPadIn SB_GB 
Those are cells that are created mainly to handle the various sources a
global network can be driven from other than a user net.

When the flag is set, this means the global network usually driven by
this BEL is in fact driven by something else and so that SB_GB BEL and
matching global network can't be used.

This is also what gets used to set the extra bits during bitstream
generation.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
325d46e284 ice40/chipdb: Add wires to global network for all cells that can drive it 
The icebox DB is a bit inconsistent in how global network connections
are represented. Here we make it appear consistent by creating ports
on the cells that can drive it.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
3f4dc7c80e ice40: Add GlobalNetowkrInfo in the chip database 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
c219d8fe4d ice40: Fix BEL validity check for PLL vs SB_IO 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
9483a95a4a ice40: Improve the is_sb_pll40_XXX predicates collection 
- Add a test for dual output PLL variant
 - Make them handle the packet version of the cell

 This will become useful for various tests during PLL rework

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
f6d6022984 ice40: Fix PLLTYPE for SB_PLL40_2F_PAD 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
ad23caef33 ice40/pll: Add proper support for PLLOUT_SELECT_xxx attributes 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
78f3c2c37d ice40: Make PLL default FEEDBACK_MODE to SIMPLE 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
35e9ec7737 ice40: Minor fix in predicate checking for logic port 
- is_sb_pll40 covers all the PLL types
 - Use helper to test for gbuf

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
ac5d767d4f ice40/pack: Stop looking for BEL when we have one during PLL placement 
Ideally we should first process all the PLL that are constrained somehow
(either explicitely or because they are PAD) and then free place the rest.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
5fb3353557 ice40/pack: Allow PLL to be constrained via 'BEL' attributes 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
8c69a3bba3 ice40/pack: Make sure we don't use a LOCKED bel when placing PLL 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
b29165eeba ice40/arch: Add helper to check if a BEL is LOCKED or not 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
Sylvain Munaut
70e1fe423f ice40/chipdb: Fix LOCKED keyword support to include all packages 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 13:12:43 +01:00
Sylvain Munaut
42fbb110fc ice40/bitstream: Handle IoCtrl.IE_ polarity when configuring unused SB_IO 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 13:12:43 +01:00
David Shah
76f575fb29 ecp5: Add support for LUT7 mux 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-18 17:17:46 +00:00
David Shah
458aa20161 ecp5: More optimal LUT6 placement 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 17:36:34 +00:00
David Shah
3ae8b86003 ecp5: Adding mux support up to LUT6 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 17:27:23 +00:00
David Shah
72b53016c0 timing: Improve crit path statistics 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 16:24:06 +00:00
David Shah
1851ebb1c6
Merge pull request #124 from smunaut/ice40_warn_sbio_misuse 
ice40: Add warning if an instanciated SB_IO has its PACKAGE_PIN used elsewhere
 2018-11-16 15:56:45 +00:00
Sylvain Munaut
e1e8d8cd14 ice40: Add warning if an instanciated SB_IO has its PACKAGE_PIN used elsewhere 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-16 16:36:57 +01:00
David Shah
af5c4d1b11
Merge pull request #123 from smunaut/ice40_fix_line_endings 
ice40/bitstream: Convert to UNIX line endings
 2018-11-16 15:28:35 +00:00
Sylvain Munaut
01950a2349 ice40/bitstream: Convert to UNIX line endings 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-16 16:24:56 +01:00
David Shah
94dc54f4fa ecp5: Add 10% safety margin to pip delays 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:35:01 +00:00
David Shah
1ae722272a ecp5: clangformat timing changes 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:27:03 +00:00
David Shah
50b85da619 ecp5: Use speed-grade-specific delay estimate 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:26:28 +00:00
David Shah
13244e513b ecp5: Fix db import, improve timing data debugging 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:26:28 +00:00
David Shah
19cc284b8c ecp5: Allow selection of device speed grade 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:26:28 +00:00
David Shah
ffe1166e33 ecp5: Post-rebase fix 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:26:28 +00:00
David Shah
2024346f4d ecp5: Consider fanout when calculating pip delays 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:26:28 +00:00
David Shah
cc746d888b ecp5: Fix timing pip classes 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:26:28 +00:00
David Shah
3ecd440748 ecp5: Use new timing data 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:26:28 +00:00
David Shah
703ff2818f ecp5: Fix timing data import 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:26:28 +00:00
David Shah
18813f2056 ecp5: Adding real timing data to database 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:26:28 +00:00
David Shah
9c52afcf5f clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:25:51 +00:00
David Shah
20aa0a0eed ice40: Remove unnecessary RAM assertion 
Fixes #121

Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:18:53 +00:00
David Shah
cfaa6c0e5d
Merge pull request #119 from cr1901/win-fix 
nextpnr-ecp5 Windows Fixes
 2018-11-16 10:00:13 +00:00
David Shah
fe4f98f26f
Merge pull request #118 from daveshah1/dcu 
Adding ECP5 DCU support
 2018-11-16 09:58:34 +00:00
David Shah
f07bd98d59 ecp5: Better use of Boost 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 09:58:18 +00:00