Commit Graph

58 Commits

Author SHA1 Message Date
David Shah
a22f86f861 ice40: Preserve top level IO properly
Signed-off-by: David Shah <dave@ds0.me>
2019-10-19 13:01:00 +01:00
David Shah
1839a3a770 Major Property improvements for common and iCE40
Signed-off-by: David Shah <dave@ds0.me>
2019-08-05 14:52:15 +01:00
Simon Schubert
88eeafae12 ice40: add RGB_DRV/LED_DRV_CUR support for u4k 2019-06-10 14:04:25 +02:00
Sylvain Munaut
d401e3e1a0 ice40: Add support for SB_I2C and SB_SPI
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2019-03-25 23:48:59 +01:00
David Shah
88e1e6bdf4 clangformat
Signed-off-by: David Shah <dave@ds0.me>
2018-12-06 10:52:46 +00:00
Daniel Serpell
d4b3c1d819 ice40: Add support for placing SB_LEDDA_IP block.
Signed-off-by: Daniel Serpell <daniel.serpell@gmail.com>
2018-12-01 22:27:04 -03:00
Sylvain Munaut
e8556aff37 ice40: Add support for SB_RGBA_DRV
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-11-19 18:20:20 +01:00
Sylvain Munaut
325d46e284 ice40/chipdb: Add wires to global network for all cells that can drive it
The icebox DB is a bit inconsistent in how global network connections
are represented. Here we make it appear consistent by creating ports
on the cells that can drive it.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-11-19 18:20:20 +01:00
Sylvain Munaut
f6d6022984 ice40: Fix PLLTYPE for SB_PLL40_2F_PAD
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-11-19 18:20:20 +01:00
Sylvain Munaut
78f3c2c37d ice40: Make PLL default FEEDBACK_MODE to SIMPLE
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-11-19 18:20:20 +01:00
David Shah
8df72a1f34 ice40: Fix SPRAM and IO globals
Signed-off-by: David Shah <dave@ds0.me>
2018-11-04 14:13:53 +00:00
David Shah
af9ed378b4 ice40: Fix PLL DYNAMICDELAY
Signed-off-by: David Shah <davey1576@gmail.com>
2018-10-27 23:28:25 +02:00
Clifford Wolf
07cf349ee4
Merge pull request #79 from YosysHQ/ice40lvds
ice40: Adding LVDS input support
2018-09-25 18:21:56 +02:00
David Shah
2ee86ab5a8 ice40: Tristate IO support fixes
Signed-off-by: David Shah <davey1576@gmail.com>
2018-09-24 15:25:37 +01:00
Miodrag Milanovic
fdf7593c42 Add needed PLLOUTGLOBAL ports and mapped it properly 2018-09-12 18:33:08 +02:00
Sergiusz Bazanski
1bf22a7f64 ice40: make PLL packing more robust 2018-08-19 21:30:55 +01:00
David Shah
0414c93403 ice40: Add HFOSC support, force fabric routing on oscillators for now
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-01 09:45:08 +02:00
Sergiusz Bazanski
90ba958abe ice40: fixes before review 2018-07-24 03:19:22 +01:00
Sergiusz Bazanski
2b1f7875bb ice40: Implement emitting PLLs 2018-07-24 02:38:10 +01:00
David Shah
bff7d673ed ice40: Packer and bitstream gen support for MAC16s
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-19 14:03:48 +02:00
David Shah
6c38df7295 ice40: Adding cell definition for DSPs
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-19 13:22:46 +02:00
David Shah
ddd94edfe0 ice40: Fixes for inverted clocks
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-18 14:01:19 +02:00
David Shah
e0a851976f refactor: Replace assert with NPNR_ASSERT
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-04 12:15:23 +02:00
David Shah
302ccc14cf ice40: UltraPlus SPRAM working
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-29 19:58:08 +02:00
David Shah
ded9df61dc Working on debugging carry packer
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-26 13:08:28 +02:00
Miodrag Milanovic
e51dd15b6b clang fix 2018-06-26 12:11:15 +02:00
Miodrag Milanovic
db890d3a81 nets and cells are unique_ptr's 2018-06-25 21:33:48 +02:00
David Shah
8d9444b6f0 ice40: More preparations for carry legalisation
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-25 14:45:33 +02:00
David Shah
bdd54a6847 Refactor: remove PlacementValidityChecker and move methods to Arch
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-25 11:43:59 +02:00
David Shah
1e8840b0f9 Update from increased clangformat line length
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-23 16:12:52 +02:00
David Shah
289fca0976 ice40: Move global net test to Arch
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-23 12:09:01 +02:00
Miodrag Milanovic
cb92c10b99 Cleanup almost all deprecation warnings 2018-06-23 09:42:48 +02:00
David Shah
8850f86a8a ice40: SB_LFOSC support, fabric routing only
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-22 19:21:39 +02:00
Clifford Wolf
aa81f9d648 Switched from clifford@clifford.at to clifford@symbioticeda.com for copyright headers
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-22 16:19:17 +02:00
Clifford Wolf
d7f424b809 Improved log messages in SA placer, minor changes from clangformat
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-19 15:00:24 +02:00
David Shah
a8071a418d ice40: Improve error reporting for invalid tristate usage
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-19 14:10:28 +02:00
David Shah
6f7070a365 ice40: More IdString API updates
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-19 11:21:16 +02:00
David Shah
e3519ddfcd ice40: Adding support for tristate IO
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-19 11:12:18 +02:00
David Shah
ec2792764a ice40: Removing deprecated API in cells.cc
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-19 10:50:23 +02:00
Clifford Wolf
79d1075345 Getting rid of old IdString API users, Add ctx to many internal APIs
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-18 17:08:35 +02:00
Clifford Wolf
8ee149f4fc Rename Design to Context, derive from Arch instead of instantiating
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-18 14:06:37 +02:00
David Shah
fc7490370b Improving code style and fixing dummy
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-18 11:43:59 +02:00
David Shah
6a937e0b45 Updating copyrights
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-17 11:49:57 +02:00
David Shah
1e6124309f ice40: Proper global promotion
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-16 17:44:35 +02:00
David Shah
bb92dc09a8 ice40: Promote reset signal
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-16 17:09:41 +02:00
David Shah
6b74d326d4 experiment: Simple heuristic-based placer
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-16 14:44:10 +02:00
David Shah
537b0e6e94 ice40: Rename ICESTORM_RAM pins
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-13 18:18:57 +02:00
Clifford Wolf
aa4fedfd54 Add A*-like optimizations to router
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-13 16:52:21 +02:00
David Shah
14b5e46b5d ice40: Promote one clock to a global buffer
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-13 15:10:42 +02:00
David Shah
94eea289ae Simple IO buffer insertion, enable packer by default
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-13 11:08:20 +02:00