Commit Graph

176 Commits

Author SHA1 Message Date
Miodrag Milanovic
a2d08dc79e Made PDPW8KC to work 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
01c631870e pio and iologic missing constants 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
8c19e6f83a clangformat 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
7ac3d0d901 basic support for few small primitives 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
2a35f0292a add constants for new primitives 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
c6f1f124f2 removed commented and not used code 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
3281ca6717 Add missing muxes for BRAM 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
437b57a510 Added getBelGlobalBuf 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
8c38e7ba61 Working BRAM 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
3a7770dca2 Add missing bel pins 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
19176ab597 Made PLL to work 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
1b3283fb7c Add constants for new bels 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
a79c2f3209 Add additional pic tiles 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
4b3ae70ca8 support DCC and use spine data 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
c04c961949 Import spine data 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
9121880c5f added a comment for constraining FF location 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
5e3fe3a4dc do not support FF on slice C when there is dpram 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
55518011e3 ramw and dram changes according to @gatecat 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
6ec3423405 LSRONMUX disable if not used by FF 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
510d92e01b cleanup FF and made DPRAM work in simple case 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
b6bb0cd5b8 Update CMakeList for machxo2 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
80c461bddd add write_bitstream to pybindings 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
05a191a014 Added LPF support 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
a0ba9afcba CCU2D is auto tied low 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
aacb36bf15 Use CCU2D cell 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
a00f810093 fix 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
6f85053b03 more like ecp5 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
3624fe90b2 one step closer 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
6508a0c267 This should not be here 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
153144022f More of making it inline 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
ca3d32e5ac make source more inline with ecp5 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
62ace58204 add missing bind and lutperm 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
7f8518d938 Import lutperm data 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
442142a47a typo fixes 2023-05-04 14:23:08 +02:00
Lofty
398b2ab569 bitstream emission update 2023-05-04 14:23:08 +02:00
Lofty
235a575267 port ecp5 split slice to machxo2 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
b033b915a6 Add bitgen for the rest of XO2 and XO3 2023-05-04 14:23:08 +02:00
Lofty
89c71bc8ac bitstream fixes for xo3 2023-05-04 14:23:08 +02:00
Miodrag Milanovic
80705e9bbb Support enabling XO3 and XO3D 2023-05-04 14:23:08 +02:00
gatecat
6455b5dd26 viaduct: Add support for GUIs
Signed-off-by: gatecat <gatecat@ds0.me>
2023-04-11 19:11:54 +02:00
Miodrag Milanovic
35eeaa7cc5 Add ramaining PIO tiles 2023-03-20 09:53:35 +01:00
Miodrag Milanovic
3f4c8d15d9 Use unified io location data 2023-03-20 09:53:35 +01:00
Miodrag Milanovic
0ce72e1a31 Use TRELLIS primitives 2023-03-20 09:53:35 +01:00
Miodrag Milanovic
ad5f6fccaa Use RelSlice, make more in line with ecp5 arch 2023-03-20 09:53:35 +01:00
gatecat
e4fcd3740d cmake: Make HeAP placer always-enabled
Signed-off-by: gatecat <gatecat@ds0.me>
2023-03-17 10:38:11 +01:00
gatecat
4111cc25d6 clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
2023-03-17 09:31:38 +01:00
Miodrag Milanovic
11a90aff83 Fix out of tree builds and place h in generated 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
f008d7c4d8 Let top tiles be on top 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
6eb5f2a77e Enable wires and add dummy wire type for now 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
1f115ddd32 Basic GUI part selection 2023-03-16 13:37:23 +01:00