Keith Rothman
a30043c8da
Fix assorted bugs in FPGA interchange.
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Fixes:
- Only use map constant pins during routing, and not during placement.
- Unmapped cell ports have no BEL pins.
- Fix SiteRouter congestion not taking into account initial expansion.
- Fix psuedo-site pip output.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-23 14:09:28 -08:00
Keith Rothman
5574455d2a
Working FF example now that constant merging is done.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-23 14:09:28 -08:00
Keith Rothman
2fc353d559
Add initial logic for handling dedicated interconnect situations.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-23 14:09:28 -08:00
Keith Rothman
15459cae91
Initial working constant network support!
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-23 14:09:27 -08:00
Keith Rothman
c21e23b3eb
Fix sign mismatch.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-18 14:08:22 -08:00
Keith Rothman
5833c90210
Emit fixed attributes to output physical netlist.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-17 12:03:17 -08:00
Keith Rothman
7c1544f4d8
Continue fixes.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-17 12:03:16 -08:00
Keith Rothman
6f1c835221
Disable traversal limit when reading logical netlist.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-17 12:03:16 -08:00
Keith Rothman
6b04fd1524
Small fixes from review.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-15 09:54:58 -08:00
Keith Rothman
664407089b
Add FPGA interchange frontend and backend.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-15 09:54:58 -08:00
