caiyu/nextpnr
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
3,267 Commits 22 Branches 7 Tags 17 MiB
a3dd5b33bc
Commit Graph

1024 Commits

Author SHA1 Message Date
Keith Rothman
a3dd5b33bc Run "make clangformat". to fix up master. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-03-18 13:30:37 -07:00
Keith Rothman
965ba00e0f Moving hash map/set type selection to header. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-03-17 16:54:29 -07:00
whitequark
e1cd98ba15 Add missing includes to fix WASI build. 2021-03-16 05:52:41 +00:00
Keith Rothman
351ca3b5ea Use NEXTPNR_NAMESPACE macro's now that headers are seperated. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-03-15 18:49:12 +00:00
gatecat
a8e35062c6
Merge pull request #621 from litghost/fix_header_nightmare 
Split nextpnr.h to allow for linear inclusion.
 2021-03-15 17:00:52 +00:00
gatecat
3c71911c26 opt-timing: Skip undriven nets 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-15 16:08:47 +00:00
Keith Rothman
fe4608386e Split nextpnr.h to allow for linear inclusion. 
"nextpnr.h" is no longer the god header.  Important improvements:

 - Functions in log.h can be used without including
   BaseCtx/Arch/Context. This means that log_X functions can be called
   without included "nextpnr.h"

 - NPNR_ASSERT can be used without including "nextpnr.h" by including
   "nextpnr_assertions.h".  This allows NPNR_ASSERT to be used safely in
   any header file.

 - Types defined in "archdefs.h" are now available without including
   BaseCtx/Arch/Context.  This means that utility classes that will be
   used inside of BaseCtx/Arch/Context can be defined safely in a
   self-contained header.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-03-15 09:05:23 -07:00
Keith Rothman
a342ae56e0 Add support for partially routed nets from the placer in router2. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-03-12 09:53:15 -08:00
Keith Rothman
7168cf8657 Add diagnostic prints to debug lookahead performance. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-03-10 09:12:50 -08:00
whitequark
979e7b8709 Only depend on Abseil in threaded builds. 
Abseil has a hard dependency on threads (not just in the build system
but in many places in the base libraries), so there is no way to use
it on WASI at the moment.
 2021-03-10 06:18:42 +00:00
gatecat
d1f44fe91a
Merge pull request #607 from litghost/add_absl_flat_hash_map 
Add absl::flat_hash_map.
 2021-03-09 08:48:25 +00:00
gatecat
326b34887c
Merge pull request #609 from YosysHQ/gatecat/sta-v2 
Use new timing engine for criticality
 2021-03-09 08:48:12 +00:00
gatecat
da88d3d825 router2: Fix vast perf drop when leaving bounding box 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-08 15:06:30 +00:00
gatecat
8a4bf3a780 timing: Integration tweaks 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-05 10:04:35 +00:00
gatecat
98d1c5a411 timing: Skip route delays for unplaced/nullptr cells 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 11:34:20 +00:00
gatecat
1ff2023f32 timing: Replace all users of criticality with new engine 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 11:29:11 +00:00
gatecat
5f6aaa2475 timing: Use new engine in SA except for budget-based mode 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 10:29:36 +00:00
gatecat
ebc2527368 timing: Use new engine for HeAP 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 10:29:36 +00:00
gatecat
bbf5a7d461 timing: Add support for critical path printing 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 10:29:36 +00:00
gatecat
e681e0f14c timing: Slack and criticality computation 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 10:29:36 +00:00
gatecat
296e6d10c2 timing: Produce plausible Fmax figure 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 10:29:36 +00:00
gatecat
541376f8cc timing: Add Fmax printing for debugging 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 10:29:36 +00:00
gatecat
16e7bba87b timing: Add backwards path walking 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 10:29:36 +00:00
gatecat
0528ceead1 timing: Add forward path walking 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 10:29:36 +00:00
gatecat
9c8d1bd6e3 timing: Compute domain pairs 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 10:29:36 +00:00
gatecat
534e69fbff timing: Add port-domain tracking 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 10:29:36 +00:00
gatecat
7a546b1554 timing: Add topological sort from Yosys 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 10:29:36 +00:00
gatecat
d0772ce1e3 timing: Import cell delays to our own structures 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 10:29:36 +00:00
gatecat
fac6a6c068 timing: Data structures for STA rewrite 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-04 10:29:36 +00:00
gatecat
6e38e236f8
Merge pull request #604 from litghost/add_counter_test 
Add counter test for FPGA interchange
 2021-03-03 07:06:07 +00:00
gatecat
27fbee5233
Merge pull request #605 from litghost/add_placement_sanity_check 
Add placement sanity check in placer_heap.
 2021-03-02 08:27:12 +00:00
Keith Rothman
392156c250 Correct spelling of RAII and add missing check in unlock_early. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-03-01 13:11:04 -08:00
Keith Rothman
0afa0da19f Add absl::flat_hash_map. 
This lowers the CPU cost of using the flat wire map in router2, and should
use less memory as well.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-03-01 09:55:54 -08:00
Keith Rothman
99a2262d61 Use scope in router1/2 and placer1. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-03-01 09:43:39 -08:00
Keith Rothman
77a5a60a66 Fix latent bug with context locking in placer HeAP. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-26 11:40:58 -08:00
Keith Rothman
7878561970 Add placement sanity check in placer_heap. 
Also check return of placer1_refine.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-26 11:27:43 -08:00
Keith Rothman
cfa449c3f3 Initial LUT rotation logic. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-26 11:01:22 -08:00
Keith Rothman
c65ba121e0 Prevent trival misplacements in placer1. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-26 10:59:48 -08:00
gatecat
b64f45a8ba Remove unused advanced timing constraint API 
This API was simply an attractive nuisance as no code was ever developed
to actually process timing constraints (other than clock constraints
which use a different API).

While I do want to consider basic false path support, among other
things, in the near future; I plan for this to use a new API that
doesn't add complexity to the BaseCtx/Context monstrosity and that is
easier to use on the timing analysis side.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-26 10:07:00 +00:00
Keith Rothman
c64a910151 Allow router2 to use routed but not fixed arcs. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-25 15:55:29 -08:00
gatecat
23413a4d12 Fix compiler warnings introduced by -Wextra 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-25 15:15:25 +00:00
gatecat
ab8dfcfba4
Merge pull request #591 from litghost/add_constant_network 
Add constant network support to FPGA interchange arch
 2021-02-25 10:22:45 +00:00
gatecat
e2cdaa653c
Merge pull request #597 from litghost/add_dynamic_bitarray 
Add dynamic bitarray to common library.
 2021-02-24 18:22:16 +00:00
Keith Rothman
6d193ffd8b Fix some bugs found in review. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-24 09:09:06 -08:00
Keith Rothman
3650294e51 Add dynamic bitarray to common library. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 15:43:47 -08:00
gatecat
19ae97afd1
Merge pull request #595 from litghost/const_cell_info 
Change CellInfo in getBelPinsForCellPin to be const.
 2021-02-23 22:55:09 +00:00
gatecat
5de1978632
Merge pull request #596 from litghost/make_clang_format 
Run "make clangformat" to fix formatting in new Bits library.
 2021-02-23 22:49:35 +00:00
Keith Rothman
5c6e231412 Remove some signedness warnings. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:28 -08:00
Keith Rothman
423a10bc31 Change CellInfo in getBelPinsForCellPin to be const. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:08:54 -08:00
Keith Rothman
bf458cbc5a Run "make clangformat" to fix new Bits library. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 13:55:05 -08:00