caiyu/nextpnr
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b1e08fa064
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75 Commits

Author SHA1 Message Date
David Shah
b1e08fa064 Playing about with placement heuristics 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah
6b74d326d4 experiment: Simple heuristic-based placer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
Clifford Wolf
8c46cc2fce Add output of estimated total wire delay to router (as metric for placement quality) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-14 19:13:14 +02:00
Clifford Wolf
66ced800d7 Increase ripup penalties over time 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-14 15:45:47 +02:00
Clifford Wolf
312699e590 Add route-ripup routing loop 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-14 15:09:13 +02:00
Clifford Wolf
7787ce5fd9 Refactor position/delay estimation API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-14 12:43:00 +02:00
David Shah
b1cbae1293 python: Clear SIGINT handler after Python loads 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-14 10:08:54 +02:00
Clifford Wolf
9b3af68e44 Improve router error reporting 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 18:28:02 +02:00
Clifford Wolf
3d5954f997 Improve router error messages 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 18:10:09 +02:00
Clifford Wolf
794fc6df60 Add support for CellInfo->pins in router 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 17:52:18 +02:00
Clifford Wolf
9eb4943bd5 Fix router error handling for unplaced cells 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 17:26:03 +02:00
Clifford Wolf
aa4fedfd54 Add A*-like optimizations to router 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 16:52:21 +02:00
David Shah
a76f5c5678 Remove IO buffers when fed by SB_IO 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 10:50:05 +02:00
Miodrag Milanovic
9953012154 reveresed logic for enabling main file, and made tests link arch files 2018-06-12 19:56:03 +02:00
David Shah
330d393c59 Fixing regression due to IDStrings 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 16:04:02 +02:00
Clifford Wolf
da33da5bc2 Minor clangformat changes 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 15:52:38 +02:00
Clifford Wolf
136ce3d18f Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-12 15:51:51 +02:00
Clifford Wolf
9c275d0a65 Add fast IdString <-> PortPin conversion 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 15:50:33 +02:00
David Shah
b77a03d195 Minimal Python bindings for IdString 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 15:48:22 +02:00
Clifford Wolf
7e879953d6 Add proper fast IdString 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 15:37:28 +02:00
David Shah
6707b985b4 ice40: Add support for LC placement constraints in packer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 15:13:50 +02:00
Clifford Wolf
a139654980 Add IdString API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 15:08:01 +02:00
Clifford Wolf
d62e341d5a Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-12 14:25:12 +02:00
Clifford Wolf
391d49c13e Add nextpnr namespace 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 14:24:59 +02:00
David Shah
47eeda40bc Implement the placement validity checker 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 13:45:59 +02:00
David Shah
2f61a9b98a ice40: Start working on a packer, currently not tested 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 12:13:11 +02:00
David Shah
5f813410aa ice40: Adding cell utilities for packing 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 11:49:54 +02:00
David Shah
3ce32b6b1d Adding some utilities for packing 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 11:02:07 +02:00
Clifford Wolf
be73894bea Add "nextpnr.h" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 20:12:57 +02:00
Clifford Wolf
ac67482380 Remove pool, dict, vector namespace aliases 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 19:56:33 +02:00
Clifford Wolf
70f322ab44 Renamed LOC attribute to BEL, fix ice40 IO bel names 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 19:52:22 +02:00
David Shah
72f5e640af Adding basic placement constraints 
Specify the attribute (* LOC="bel_name" *) on any cell to constrain its
placement to that bel.

Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-09 19:38:37 +02:00
Clifford Wolf
dfbfbf87db Add very basic router 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 18:19:20 +02:00
Clifford Wolf
208d378322 Remove writing on sell types to cout (left over debug output?) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 15:20:13 +02:00
David Shah
57cd67dbc1 Improving the Python bindings, particularly the map/pair wrappers 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-08 15:53:24 +02:00
David Shah
c16a971c0f python: Fixing builds as importable module 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-08 11:17:04 +02:00
David Shah
7f330af9f3 Reformat remaining files 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-08 11:04:02 +02:00
ZipCPU
4499864024 Applied clang-format to my own contributions 2018-06-07 15:38:24 -04:00
ZipCPU
a4f687548e Adjusted info message names for rule-checker and parser 2018-06-07 12:04:01 -04:00
Clifford Wolf
37d2fc65b1 Fix placer build for dummy arch 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-07 17:50:36 +02:00
ZipCPU
c352f6536b Moved placer definitions to place.h, main automatically runs placer now 2018-06-07 09:49:21 -04:00
ZipCPU
f32b9622d5 Initial (random) placer capability 
This commit also includes changes to jsonparse to allow it to
1) recognize ports with no connection, and set their net pointers to NULL
2) recognize designs with a ports node rather than a ports_direction

The rule checker has also been modified to accommodate possible NULL netlists

The ice40 chip now also has iterator operations ++bi and bi++.
 2018-06-07 09:38:14 -04:00
ZipCPU
1ed5c641c1 Merge branch 'master' into gqtech 2018-06-07 07:45:22 -04:00
David Shah
ed0c44891f Replacing Boost type_traits with std 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 13:36:42 +02:00
David Shah
c3e0252703 Reformat Python bindings and ice40 main 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 13:10:53 +02:00
David Shah
9ebc879826 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-07 12:59:41 +02:00
David Shah
b0e66d441c Global design object working 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 12:57:52 +02:00
Clifford Wolf
1ea8fa4881 clang-format for design and chip codebase 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-07 12:56:49 +02:00
Clifford Wolf
2edde06c07 Fix clang-format include order issues 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-07 12:48:53 +02:00
David Shah
a5249da02d Working on global Python design object 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 12:40:31 +02:00