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Author SHA1 Message Date
gatecat
8f722a0d35 ice40: Use default value when IP is missing BUS_ADDR74 parameter 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-07-20 16:08:26 +01:00
gatecat
08bbe173ce Fix definition of an empty IdStringList 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-07-20 15:51:04 +01:00
gatecat
41eecd7ce2 gui: Improve Fatal Error message 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-07-20 15:01:34 +01:00
gatecat
f3be638ea9
Merge pull request #767 from YosysHQ/gatecat/ic-pref-const 
interchange: Fix preferred constant handling when canInvert
 2021-07-20 12:04:12 +01:00
gatecat
ffd97945ba interchange: Fix preferred constant handling when canInvert 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-07-20 10:42:04 +01:00
gatecat
c6aa51a2de
Merge pull request #766 from pepijndevos/python 
Remove python path from gowin target
 2021-07-17 20:37:04 +01:00
Pepijn de Vos
916ae180ac remove generic leftover in gowin 2021-07-17 17:36:54 +02:00
Pepijn de Vos
811f5b4d18 remove generic leftover in gowin 2021-07-17 17:35:49 +02:00
Maciej Kurc
ccf2bb123c Added computing and reporting LUT mapping cache size 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-07-16 15:53:00 +02:00
Maciej Kurc
c95aa86a8e Fixed assertion typos 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-07-16 15:16:31 +02:00
Maciej Kurc
857961a6bb Migrated C arrays to std::array containers. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-07-16 14:55:45 +02:00
Maciej Kurc
0336f55b16 LUT mapping ceche optimizations 2 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-07-16 13:55:19 +02:00
Maciej Kurc
044c9ba2d4 LUT mapping cache optimizations 1 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-07-16 13:28:40 +02:00
Maciej Kurc
d52516756c Working site LUT mapping cache 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-07-16 12:51:28 +02:00
gatecat
2c4599612c
Merge pull request #764 from acomodi/fix-pseudo-pips 
interchange: disallow pseudo-pip on same nets if tile has luts
 2021-07-15 17:39:13 +01:00
Alessandro Comodi
7edfcc3bfa interchange: disallow pseudo-pip on same nets if tile has luts 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-07-15 16:06:00 +02:00
gatecat
084e15f9cf
Merge pull request #762 from antmicro/testarch_timing 
[interchange] Update chipdb and python-fpga-interchange versions
 2021-07-14 17:44:50 +01:00
Maciej Dudek
9190bda27d [interchange] Update chipdb and python-fpga-interchange versions 
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
 2021-07-14 17:19:30 +02:00
gatecat
034467ff61
Merge pull request #761 from acomodi/interchange-constrs 
interchange: add user placement constraints handling
 2021-07-12 20:04:48 +01:00
Alessandro Comodi
7abfeb11c3 interchange: xdc and place constr: address review comments 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-07-12 17:17:57 +02:00
Alessandro Comodi
3de0be7c06 interchange: xdc: add get_cells command 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-07-12 16:45:11 +02:00
Alessandro Comodi
d9668df818 interchange: add constraints constraints application routine 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-07-12 16:45:08 +02:00
gatecat
24b7084feb
Merge pull request #760 from YosysHQ/gatecat/xcup-ibufds 
interchange: Support for UltraScale+ differential input buffers
 2021-07-12 13:00:44 +01:00
gatecat
f03abe14d1 interchange: Skip IO ports in dedicated routing check 
These have already been dealt with in arch_pack_io

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-07-12 11:43:18 +01:00
gatecat
8604b03008 interchange: Debug IO port validity check failures 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-07-12 11:40:23 +01:00
gatecat
96a5885051 interchange: Place DIFFINBUF and IBUFCTRL for UltraScale+ IBUFDS 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-07-12 11:30:21 +01:00
gatecat
a63e7b3db8
Merge pull request #759 from pepijndevos/gw1ndb 
GW1NR is not a seperate family, but GW1NS is
 2021-07-11 14:00:52 +01:00
Pepijn de Vos
c89c14b6bf GW1NR is not a seperate family, but GW1NS is 2021-07-11 14:12:34 +02:00
gatecat
eecc6147df
Merge pull request #758 from YosysHQ/gatecat/hist-oob 
timing: Fix out-of-bounds histogram bins in all cases
 2021-07-11 08:10:57 +01:00
gatecat
76070a7647 timing: Fix out-of-bounds histogram bins in all cases 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-07-10 23:44:21 +01:00
gatecat
8531658019 Merge branch 'master' of github.com:YosysHQ/nextpnr 2021-07-10 23:24:38 +01:00
gatecat
d290766101 ice40: Fix order of values in error 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-07-10 23:23:19 +01:00
gatecat
478456e6e9
Merge pull request #755 from yrabbit/io_port 
Pin modes parser
 2021-07-08 17:22:10 +01:00
gatecat
7b62c7fa50
Merge pull request #756 from acomodi/fix-clustering-runtime 
interchange: reduce run-time to check dedicated interconnect
 2021-07-08 16:58:44 +01:00
Alessandro Comodi
b64642fc99 interchange: bump python-interchange version 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-07-08 16:51:23 +02:00
Alessandro Comodi
fbd291deaf interchange: update chipdb version 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-07-08 16:51:23 +02:00
Alessandro Comodi
dc0819b01a interchange: reduce run-time to check dedicated interconnect 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-07-08 16:51:23 +02:00
gatecat
6829e4c197 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-07-08 15:42:36 +01:00
YRabbit
881fd97c5a Fix the boolean. 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2021-07-08 07:09:30 +10:00
YRabbit
d613626ab9 Fix formating 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2021-07-07 22:53:49 +10:00
YRabbit
5d8b27710d Fix boolean value. 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2021-07-07 22:02:43 +10:00
YRabbit
5f018df4e4 Merge branch 'master' into io_port 2021-07-07 08:36:45 +10:00
YRabbit
fd7734f000 Wip parser 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2021-07-07 08:36:05 +10:00
gatecat
c696e88573
Merge pull request #751 from trabucayre/gw1ns-2 
add support for GW1NS-2 family
 2021-07-06 15:17:41 +01:00
gatecat
bf542f07b0
Merge pull request #754 from YosysHQ/gatecat/ecp5-dcs 
ecp5: Add DCSC support
 2021-07-06 14:06:31 +01:00
Gwenhael Goavec-Merou
027d54e771 .cirrus/Dockerfile.ubuntu20.04: update apycula to 0.0.1a9 2021-07-06 14:34:33 +02:00
gatecat
5b2db015a9
Merge pull request #752 from YosysHQ/gatecat/du-mem-error 
design_utils: Fix memory error
 2021-07-06 12:43:48 +01:00
gatecat
81c549549d ecp5: Add DCSC support 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-07-06 11:45:37 +01:00
gatecat
c0bb2fb76a
Merge pull request #750 from YosysHQ/gatecat/io-improve 
IO improvements for OBUFTDS
 2021-07-06 11:43:24 +01:00
gatecat
3d0facf119 design_utils: Fix memory error 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-07-06 11:35:27 +01:00