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166 Commits

Author SHA1 Message Date
Ross Schlaikjer
0043ae0807
Issue warning for mixed-mode inputs 2020-04-29 14:39:52 -04:00
Ross Schlaikjer
5e763b1afc
Alter MULT18X18D timing db based on register config 
If the REG_INPUTA_CLK and REG_INPUTB_CLK values are set, then we should
use the faster setup/hold timings for the 18x8 multiplier.
Similarly, check the value of REG_OUTPUT_CLK for whether or not to use
faster timings for the output.

This is based on how I currently understand the registers to work - if
anyone knows the actual rules for when each timing applies please do
chime in to correct this implementation if necessary.

Along the same lines, this PR does not address the case when the
pipeline registers are enabled, since it is not clear to me how exactly
that affects the timing.
 2020-04-28 20:01:29 -04:00
David Shah
396dfb7d5e
Merge pull request #423 from rschlaikjer/rschlaikjer-regmode-timing-database 
Add support for REGMODE to DP16KD
 2020-04-07 20:02:29 +01:00
Ross Schlaikjer
3aecb3b08c
No need to fetch context 2020-04-07 14:44:19 -04:00
Ross Schlaikjer
fc591421f9
Change assert to error 2020-04-07 14:42:27 -04:00
Ross Schlaikjer
e46b990251
Rearrange bool algebra 2020-04-07 14:31:17 -04:00
Ross Schlaikjer
3257bdc8a1
Actually just move all the logic to ArchInfo 2020-04-07 14:11:49 -04:00
Ross Schlaikjer
0bdf1e05f1
Extract regmode configuration to ArchInfo 2020-04-07 14:03:55 -04:00
David Shah
f9a76c56f7 ecp5: Allow use of IDDRXN and ODDRXN type primitives on the same pin 
Signed-off-by: David Shah <dave@ds0.me>
 2020-04-03 09:53:14 +01:00
David Shah
3b5e64e8c6 ecp5: Fix tieoff of unused DELAY signals 
Signed-off-by: David Shah <dave@ds0.me>
 2020-01-21 19:02:26 +00:00
David Shah
349be76d26 ecp5: Add support for flipflops with preload 
Signed-off-by: David Shah <dave@ds0.me>
 2019-12-07 12:20:25 +00:00
David Shah
ff30bc87fe ecp5: Fix placement of DDRDLLA 
Signed-off-by: David Shah <dave@ds0.me>
 2019-11-29 10:50:13 +00:00
David Shah
aee2e01983 ecp5: Improve flipflop packing density 
Signed-off-by: David Shah <dave@ds0.me>
 2019-11-20 18:22:22 +00:00
David Shah
c3d4117a21 ecp5: Fix handling of custom DEL_VALUE 
Signed-off-by: David Shah <dave@ds0.me>
 2019-11-18 22:03:11 +00:00
David Shah
9a848d9d76 ecp5: Add logic utilisation before packing statistics 
Signed-off-by: David Shah <dave@ds0.me>
 2019-11-18 16:54:42 +00:00
David Shah
d08e2ade88
Merge pull request #345 from YosysHQ/dave/sdf 
Improve handling of top level IO and add SDF support
 2019-11-18 14:28:40 +00:00
David Shah
21c09c8b8f ecp5: Copy timing constraints across ECLKBRIDGECS 
Signed-off-by: David Shah <dave@ds0.me>
 2019-11-01 16:27:51 +00:00
David Shah
58b7cb920f ecp5: Fix placement of ECLKBRIDGECS 
Signed-off-by: David Shah <dave@ds0.me>
 2019-11-01 16:07:51 +00:00
David Shah
cf5cbd1153 ecp5: Preserve top level IO properly 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-18 15:58:57 +01:00
David Shah
8f86ccc412 ecp5: Add support for ECLKBRIDGECS 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-11 14:52:31 +01:00
David Shah
f2fd1bf80a ecp5: Fix tristate IO registers 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-09 14:35:16 +01:00
David Shah
c6401413a4 ecp5: Add support for IO registers 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-09 14:23:35 +01:00
David Shah
a14555c8d1 ecp5: Add IDDR71B support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-09 12:07:56 +01:00
David Shah
21847a55e0 ecp5: Add ODDR71B support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-09 11:23:20 +01:00
David Shah
cba36239a4 ecp5: Fix parameters 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-04 14:54:31 +01:00
David Shah
d04e5954a6 ecp5: Adding support for 36-bit wide PDP RAMs 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-01 12:01:33 +01:00
David Shah
2ace9b5ad3 ecp5: Move clock constraints across IO and DCCA 
Signed-off-by: David Shah <dave@ds0.me>
 2019-09-13 16:50:07 +01:00
David Shah
78f86ce67a ecp5: Add GSR/SGSR support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-08-27 13:14:41 +01:00
David Shah
661237eb64 ecp5: Add --out-of-context for building hard macros 
Signed-off-by: David Shah <dave@ds0.me>
 2019-08-07 14:22:47 +01:00
David Shah
7126dacccd ecp5: Add a check for legacy parameter values 
Signed-off-by: David Shah <dave@ds0.me>
 2019-08-06 09:53:33 +01:00
David Shah
ec48f8f464 ecp5: New Property interface 
Signed-off-by: David Shah <dave@ds0.me>
 2019-08-05 17:22:37 +01:00
David Shah
d297a96dc1 ecp5: Fix missing LUT inputs, fixes #301 
Signed-off-by: David Shah <dave@ds0.me>
 2019-07-10 09:34:22 +01:00
Miodrag Milanovic
36ccc22fc9 Use flags for each step 2019-06-14 09:59:04 +02:00
Miodrag Milanovic
d9b0bac248 Save top level attrs and store current step 2019-06-07 16:11:11 +02:00
David Shah
15a1d4f582 ecp5: Use an attribute to store is_global 
Signed-off-by: David Shah <dave@ds0.me>
 2019-06-07 11:55:20 +01:00
Miodrag Milanovic
1093d7e122 WIP saving/loading attributes 2019-06-07 11:48:15 +02:00
Miodrag Milanovic
d5d8213871 Added support for attributes/properties types 2019-06-01 15:52:32 +02:00
David Shah
12f375a239 ecp5: Fix USRMCLK primitive 
Signed-off-by: David Shah <dave@ds0.me>
 2019-05-10 18:51:45 +01:00
David Shah
df79d94944 ecp5: DELAY fixes 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-25 11:49:25 +00:00
David Shah
95a85c8ea7 ecp5: Improve packing density 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-25 11:49:25 +00:00
David Shah
a0fa164399 ecp5: Add criticality-based LUT permutation 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-25 11:49:25 +00:00
David Shah
998d055ea7 ecp5: Speed up timing analysis 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-25 11:49:25 +00:00
David Shah
64dc453f12 ecp5: DELAYF/G fixes 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 13:53:06 +00:00
David Shah
0d83f3fcfe ecp5: Connect unused DQSBUF inputs to GND 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-02-24 10:28:25 +01:00
David Shah
ab50a6ef54 ecp5: Compute derived constraints iteratively 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-02-24 10:28:25 +01:00
David Shah
ae6c1170ef ecp5: Derived constraint support for PLLs, clock dividers and oscillators 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-02-24 10:28:25 +01:00
David Shah
e50ab2106f ecp5: Fixes for litedram 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-02-24 10:28:25 +01:00
David Shah
817ba5a4b9 ecp5: Add DELAYF/DELAYG support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-02-24 10:28:25 +01:00
David Shah
491d64293d ecp5: Add DDRDLLA support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
68abcb365a ecp5: Add ECLKSYNCB support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
49e9453820 ecp5: Add TSHX2DQSA support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
82ad10a395 ecp5: Add TSHX2DQA support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
6e8fbe8cdf ecp5: Add IDDRX2DQA support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
4e49ab1625 ecp5: Add ODDRX2DQSB suppport 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
6f203dfd7b ecp5: Add ODDRX2DQA support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
4402361246 ecp5: Helper functions and bitstream for DQS 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
eb45956d0e ecp5: Constraint checker and placer for DQSBUFM 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
fe2375324d ecp5: Add OSHX2A support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
8a64a72a21 ecp5: Add IDDRX2F support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
52d1954d96 ecp5: Packing of ODDRX2F 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
63e1f02c65 ecp5: Helper functions for DQS and ECLK 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah
1661350d25 ecp5: Check for incorrect use of TRELLIS_IO 'B' pin 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-25 19:45:10 +00:00
David Shah
dc10fe0319 ecp5: Fix ODDR when used with manually instantiated TRELLIS_IO 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-12-19 10:11:29 +00:00
David Shah
d75075e15c ecp5: Fix IOLOGIC ports at the same constant value 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-12-15 13:52:18 +00:00
David Shah
c01bb88509 ecp5: Add IOLOGIC timing and bitstream; ODDR working 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-14 16:40:38 +00:00
David Shah
9dc845b20d ecp5: Add ODDR packing 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-14 14:59:14 +00:00
David Shah
36b1650df7 ecp5: Adding IOLOGIC packing 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-14 09:55:04 +00:00
David Shah
5ddf99cf5d ecp5: Pre-place PLLs and use dedicated routes into globals 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-30 16:09:56 +00:00
David Shah
76f575fb29 ecp5: Add support for LUT7 mux 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-18 17:17:46 +00:00
David Shah
458aa20161 ecp5: More optimal LUT6 placement 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 17:36:34 +00:00
David Shah
3ae8b86003 ecp5: Adding mux support up to LUT6 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 17:27:23 +00:00
David Shah
91a0927196 ecp5: Support LOC attribute on DCUs 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-15 11:30:27 +00:00
David Shah
0eba7d9789 ecp5: EXTREFB fixes 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-15 11:30:27 +00:00
David Shah
bc022173f0 ecp5: clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-15 11:30:27 +00:00
David Shah
36178a5713 ecp5: Trim IO connected to top level ports 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-15 11:30:27 +00:00
David Shah
e9fe444dc7 ecp5: Adding ancillary DCU bels 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-15 11:30:27 +00:00
David Shah
37cbabecfb ecp5: remove debug and clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-15 11:30:27 +00:00
David Shah
c5a3571a06 ecp5: Working on DCU 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-15 11:30:27 +00:00
David Shah
24a2feda30 ecp5: Separate global promotion and routing 
Signed-off-by: David Shah <dave@ds0.me>
 2018-10-31 16:22:34 +00:00
David Shah
c782f07b1b ecp5: Add IO buffer insertion 
Signed-off-by: David Shah <dave@ds0.me>
 2018-10-31 11:30:09 +00:00
David Shah
0ac48c6a08 ecp5: DSP fixes 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-22 16:18:29 +01:00
David Shah
535a6f625a ecp5: Working on DSPs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-22 11:19:59 +01:00
David Shah
d716292e3d ecp5: BRAM improvements with constant/inverted inputs 
Signed-off-by: David Shah <dave@ds0.me>
 2018-10-06 15:59:22 +01:00
David Shah
cd688a2784 ecp5: Fixing EBR constant tie-offs 
Signed-off-by: David Shah <dave@ds0.me>
 2018-10-05 16:47:03 +01:00
David Shah
bf7161d2b4 ecp5: Negative clock support, general slice improvements 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-02 15:50:45 +01:00
David Shah
8cbc92b7f3 ecp5: Small DRAM routing fixes 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-01 18:45:14 +01:00
David Shah
9ebec3b87f clangformat 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-01 18:20:14 +01:00
David Shah
fd4498736e ecp5: Fix packing of FFs into carry/DRAM slices 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-01 18:19:56 +01:00
David Shah
c8a9bb807c ecp5: Debugging DRAM packing 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-01 17:45:35 +01:00
David Shah
9518c5d762 ecp5: Working on DRAM packing 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-01 17:05:02 +01:00
David Shah
d770eb672f ecp5: Helper functions for distributed RAM support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-01 15:23:12 +01:00
David Shah
931c78b1bb ecp5: Improve handling of constant CCU2C inputs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-01 14:42:19 +01:00
David Shah
e7c8818424 ecp5: Fix carry feed out 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-30 19:27:06 +01:00
David Shah
6a1b49c311 ecp5: Improve mixed no-FF/FF placement 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-30 18:39:53 +01:00
David Shah
3e399c9f20 ecp5: Carry packing fixes 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-30 18:10:20 +01:00
David Shah
9218d2e56b ecp5: Relative placement and bitstream gen for carries 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-30 17:42:47 +01:00
David Shah
fef29d8762 ecp5: First stages of carry packing 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-30 17:18:30 +01:00
David Shah
e81a95cf7e ecp5: Add ccu2c_to_slice 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-30 17:06:06 +01:00
David Shah
2628344298 ecp5: Support code for carry chain handling 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-30 16:58:02 +01:00
David Shah
a27c7b45de Refactor chain finder to its own file 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-30 16:29:26 +01:00