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730 Commits

Author SHA1 Message Date
D. Shah
b4227f586c Rename ArchBase to BaseArch for consistency with BaseCtx 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
297cd026b9 Add default implementation of bel bucket functions 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
ed8e3c83d9 Add default implementation of some range-returning functions 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
6d794abf49 Add a few more functions to ArchBase 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
d4363b7ee5 ecp5: Use common wire/pip binding 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
cfa9a9daec nextpnr: Use templates to specify range types 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
8f76af40db nextpnr: Add base virtual functions for non-range Arch API 
This makes the Arch API clearer and also allows a base implementation of
functions to reduce the amount of complexity to get a basic Arch up and
running.

Currently this only implements these for functions that don't return a
range. Range-returning functions will require more work in order due to
the current 'duck typing' approach (probably a struct that contains the
range types combined with templating.)

Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-05 19:19:17 +00:00
D. Shah
f05d024666 ecp5: Use snake case for arch-specific functions 
This makes the difference clearer between the general arch API that
everyone must implement; and helper functions specific to one arch.

Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-03 10:53:08 +00:00
D. Shah
d792bce0fb ecp5: Implement IdStringList for all arch object names 
This is a complete implementation of IdStringList for ECP5; excluding
the GUI (which you will have to disable for it to build).

Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-02 17:00:32 +00:00
D. Shah
9388df19d3 refactor: Replace getXName().c_str(ctx) with ctx->nameOfX 
This makes the ongoing migration to IdStringList easier.

Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-02 17:00:14 +00:00
D. Shah
6d23461bcd ecp5: Proof-of-concept using IdStringList for bel names 
This uses the new IdStringList API to store bel names for the ECP5. Note
that other arches and the GUI do not yet build with this
proof-of-concept patch.

getBelByName still uses the old implementation and could be more
efficiently implemented with further development.

Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-02 17:00:12 +00:00
D. Shah
ff92d19fed arch: Add getNameDelimiter API for string lists 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-02 16:59:40 +00:00
Keith Rothman
da74a425d2 Run "make clangformat". 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-02 07:44:49 -08:00
Keith Rothman
9089ee2d16 Add pybindings for new APIs. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-02 07:43:36 -08:00
Keith Rothman
9fe546f279 Rename Partition -> BelBucket. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-02 07:34:56 -08:00
Keith Rothman
d03d9d839b Working compile of ECP5. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-02 07:34:56 -08:00
Keith Rothman
71e210dd4b Refactor ECP5 to new Partition API. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-02 07:34:56 -08:00
Keith Rothman
2285c8dbbd Initial refactoring of placer API. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-02 07:34:56 -08:00
Keith Rothman
5cf2f8d1ea Seperate PipRange types in pybindings_shared. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-01 10:23:21 -08:00
D. Shah
94e8847d67 cleanup: Spelling fixes 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-01-28 15:19:06 +00:00
D. Shah
6ecf7f86c8 cleanup: Remove dead/unused code 
Note that some '#if 0' code that might still be useful for debugging in
the future has been retained.

Signed-off-by: D. Shah <dave@ds0.me>
 2021-01-28 14:59:13 +00:00
D. Shah
75ee2fc4e6 Move RelPtr/RelSlice out of arches into common 
The bba approach seems widely used enough that it's reasonable for this
to become part of common code.

Signed-off-by: D. Shah <dave@ds0.me>
 2021-01-27 20:43:01 +00:00
D. Shah
3fc5455ec5 ecp5: Switch from RelPtr to RelSlice 
This replaces RelPtrs and a separate length field with a Rust-style
slice containing both a pointer and a length; with bounds checking
always enforced.

Thus iterating over these structures is both cleaner and safer.

Signed-off-by: D. Shah <dave@ds0.me>
 2021-01-27 19:39:19 +00:00
D. Shah
dc46d84c35 ecp5: Fix bottom clock tile renaming for tilegroups 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-01-25 15:45:56 +00:00
David Shah
818faa78aa clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2020-12-30 16:49:55 +00:00
David Shah
5e53a18292 ecp5: Improve pseudo-diff IO error handling 
Signed-off-by: David Shah <dave@ds0.me>
 2020-12-27 20:14:49 +00:00
David Shah
c667c56bd9 ecp5: Fix FF timing data 
Signed-off-by: David Shah <dave@ds0.me>
 2020-12-17 20:27:32 +00:00
Yehowshua Immanuel
fe8a011629
Update CMakeLists.txt 
I believe Prjtrellis has CMAKE define pytrellis as a shared module, not library.
On MacOS, this makes a difference and NextPNR expected ``.dylib``
instead of ``.so``. Things still work on Linux.
 2020-11-17 17:53:46 -05:00
David Shah
06555aa003 clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2020-11-14 09:07:34 +00:00
David Shah
8686b6dada RelPtr: remove copy constructor and copy assignment 
These operations are meaningless for a data structure that references
another structure relative to its location.

Signed-off-by: David Shah <dave@ds0.me>
 2020-11-13 20:19:53 +00:00
David Shah
9916525418 ecp5: Fix handling of CLK/LSR wire attached settings 
Signed-off-by: David Shah <dave@ds0.me>
 2020-11-05 11:53:55 +00:00
David Shah
b18ea204c2 Remove wire alias API 
It has not actually been implemented in any router for over 2.5 years and causes nothing more than confusion. It can always be added back if it forms part of a future solution; possibly as part of a more general database structure rethink.

Signed-off-by: David Shah <dave@ds0.me>
 2020-10-15 09:36:15 +01:00
David Shah
576baa994f ecp5: Fix some tricky ECLKSYNCB/CLKDIVF packing cases 
Signed-off-by: David Shah <dave@ds0.me>
 2020-10-09 21:41:55 +01:00
David Shah
c4244d967d docs: Tidy up 
Signed-off-by: David Shah <dave@ds0.me>
 2020-10-01 09:02:29 +01:00
kittennbfive
3c7c95ecce
Update primitives.md 2020-09-30 19:29:13 +00:00
David Shah
9aff6aa55c ecp5: Add support for setting PIO clamp 
Signed-off-by: David Shah <dave@ds0.me>
 2020-09-26 09:24:01 +01:00
William D. Jones
e63270f918 Fix MESSAGE indicating where externally-built .bbas live. 2020-08-22 21:09:21 -04:00
David Shah
be607c10a8
Merge pull request #489 from YosysHQ/dave/ecp5-fix-ioddrx2 
ecp5: Fix how ODDRX2 SCLK/RST are set
 2020-08-13 20:05:16 +01:00
David Shah
fd5d95320b ecp5: Fix how ODDRX2 SCLK/RST are set 
Signed-off-by: David Shah <dave@ds0.me>
 2020-08-13 13:24:52 +01:00
David Shah
e475490992 ecp5: Run fixupHierarchy after packing 
Signed-off-by: David Shah <dave@ds0.me>
 2020-08-12 10:12:10 +01:00
Miodrag Milanovic
8f2b707d02 Initial conversion to pybind11 2020-07-23 18:35:18 +02:00
David Shah
467d26d9e6 ecp5: Add a warning for unknown LPF IOBUF attrs 
Signed-off-by: David Shah <dave@ds0.me>
 2020-07-13 17:30:24 +01:00
David Shah
19a4ddf2f0 ecp5: Add SYSCONFIG settings to bitstream 
Signed-off-by: David Shah <dave@ds0.me>
 2020-07-12 14:51:14 +01:00
David Shah
6016e54d6c ecp5: Add parsing of SYSCONFIG line in LPF 
Signed-off-by: David Shah <dave@ds0.me>
 2020-07-12 12:53:16 +01:00
David Shah
137241cfef
Merge pull request #463 from YosysHQ/fix-archcheck 
Fix arch checks, and add these to CI
 2020-07-02 13:32:30 +01:00
whitequark
18bb70afca CMake: improve logic for discovering Trellis. 2020-07-01 21:11:03 +00:00
whitequark
f6e30f22f4 CMake: fix path checks in chipdb build scripts. 
`if(NOT DEFINED)` is not appropriate since a variable that contains
`-NOTFOUND` still counts as `DEFINED`. This can cause issues if
configuration fails, writes `-NOTFOUND` to the cache, and is then
restarted.
 2020-07-01 20:22:21 +00:00
David Shah
c0901fb972 ecp5: Fix derivation of OSCG timing constraint 
Signed-off-by: David Shah <dave@ds0.me>
 2020-06-29 22:11:00 +01:00
David Shah
2c4ae853f2 ecp5: Fix getTileBelDimZ 
Signed-off-by: David Shah <dave@ds0.me>
 2020-06-29 19:52:31 +01:00
Miodrag Milanovic
7a95629aff Fix clangformat and execute it 2020-06-27 13:20:16 +02:00
Miodrag Milanovic
901ad4e917 Update git ignore locations 2020-06-27 13:18:06 +02:00
David Shah
4f4aa53120
Merge pull request #460 from whitequark/better-embed 
Simplify and improve chipdb embedding/loading
 2020-06-26 11:32:13 +01:00
whitequark
89e0cc8078 Simplify and improve chipdb embedding/loading. 2020-06-26 08:36:07 +00:00
whitequark
19a3095ecb Fix typo 2020-06-25 17:26:57 +00:00
whitequark
bf8d4c428e CMake: require at least version 3.5 (Ubuntu 16.04). 2020-06-25 14:03:37 +00:00
whitequark
1dc1164dce CMake: rewrite chipdb handling from ground up. 2020-06-25 14:03:37 +00:00
David Shah
43fd9e6779 ecp5: Fix placement of DCCs to guarantee routeability 
Signed-off-by: David Shah <dave@ds0.me>
 2020-06-10 15:47:47 +01:00
David Shah
f44498a530
Merge pull request #447 from whitequark/wasi 
Port nextpnr-{ice40,ecp5} to WASI
 2020-05-24 14:23:35 +01:00
whitequark
e7bb04769d Port nextpnr-{ice40,ecp5} to WASI. 
This involves very few changes, all typical to WASM ports:
  * WASM doesn't currently support threads or atomics so those are
    disabled.
  * WASM doesn't currently support exceptions so the exception
    machinery is stubbed out.
  * WASM doesn't (and can't) have mmap(), so an emulation library is
    used. That library currently doesn't support MAP_SHARED flags,
    so MAP_PRIVATE is used instead.

There is also an update to bring ECP5 bbasm CMake rules to parity
with iCE40 ones, since although it is possible to embed chipdb into
nextpnr on WASM, a 200 MB WASM file has very few practical uses.

The README is not updated and there is no included toolchain file
because at the moment it's not possible to build nextpnr with
upstream boost and wasi-libc. Boost requires a patch (merged, will
be available in boost 1.74.0), wasi-libc requires a few unmerged
patches.
 2020-05-23 20:57:26 +00:00
David Shah
2d406f3e27
Merge pull request #440 from YosysHQ/lattice-fixes 
Fixes for the Lattice SERDES eye demo designs
 2020-05-18 09:38:41 +01:00
David Shah
ddf546c2cc clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2020-05-16 12:57:24 +01:00
David Shah
0fb7746c20
Merge pull request #442 from nategraff-sifive/fix-unsupported-spelling 
Fix spelling of 'unsupported'
 2020-05-14 22:10:06 +01:00
David Shah
163dee1e1a ecp5: Disconnect dedicated DCU inputs if connected to constants 
Signed-off-by: David Shah <dave@ds0.me>
 2020-05-14 13:26:56 +01:00
David Shah
3c60ea383d ecp5: Improve global routing robustness 
Signed-off-by: David Shah <dave@ds0.me>
 2020-05-14 13:12:30 +01:00
David Shah
2aaef61547 ecp5: Don't promote VCC/GND to globals even if connected to clock port 
Signed-off-by: David Shah <dave@ds0.me>
 2020-05-14 13:07:59 +01:00
David Shah
2cebd40f2e lpf: Support // comments 
Signed-off-by: David Shah <dave@ds0.me>
 2020-05-14 13:06:58 +01:00
Nathaniel Graff
08f68518f2 Fix spelling of 'unsupported' 
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
 2020-05-13 20:00:37 -07:00
Mike Walters
5b660e3432 ecp5: Allow setting drive strength for LVCMOS33D IOs 2020-05-12 14:19:37 +01:00
David Shah
84327b634c ecp5: MULT18X18D timing fixes 
Signed-off-by: David Shah <dave@ds0.me>
 2020-05-01 08:17:29 +01:00
Ross Schlaikjer
a1160068c8
No cell delay for clocked MULT18X18D 2020-04-30 11:09:22 -04:00
Ross Schlaikjer
de6ddc470b
Further condense 2020-04-29 14:52:29 -04:00
Ross Schlaikjer
6e8082860e
Dedupe clock error check 2020-04-29 14:46:09 -04:00
Ross Schlaikjer
0043ae0807
Issue warning for mixed-mode inputs 2020-04-29 14:39:52 -04:00
Ross Schlaikjer
6625284950
Handle register timing case 2020-04-29 13:58:52 -04:00
Ross Schlaikjer
a4fa953740
Use registered port class on mult18x18 2020-04-29 11:08:53 -04:00
Ross Schlaikjer
5e763b1afc
Alter MULT18X18D timing db based on register config 
If the REG_INPUTA_CLK and REG_INPUTB_CLK values are set, then we should
use the faster setup/hold timings for the 18x8 multiplier.
Similarly, check the value of REG_OUTPUT_CLK for whether or not to use
faster timings for the output.

This is based on how I currently understand the registers to work - if
anyone knows the actual rules for when each timing applies please do
chime in to correct this implementation if necessary.

Along the same lines, this PR does not address the case when the
pipeline registers are enabled, since it is not clear to me how exactly
that affects the timing.
 2020-04-28 20:01:29 -04:00
David Shah
de00c00aac ecp5: Fix CSDECODE bitgen 
Signed-off-by: David Shah <dave@ds0.me>
 2020-04-15 20:25:56 +01:00
David Shah
64d3e3e1e8 ecp5: Use dedicated routing for ECLKs where possible 
Signed-off-by: David Shah <dave@ds0.me>
 2020-04-14 19:20:13 +01:00
Miodrag Milanovic
96c14abd1f Add TRELLIS_PROGRAM_PREFIX 2020-04-11 22:05:30 +02:00
David Shah
a8111bba83 ecp5: Fix routing bitgen for non-SERDES 'VCIB' tiles 
Signed-off-by: David Shah <dave@ds0.me>
 2020-04-10 08:25:16 +01:00
David Shah
ced336492c ecp5: Make hysteresis default-on for LVCMOS33 bidir as well as input 
Signed-off-by: David Shah <dave@ds0.me>
 2020-04-09 21:36:27 +01:00
David Shah
396dfb7d5e
Merge pull request #423 from rschlaikjer/rschlaikjer-regmode-timing-database 
Add support for REGMODE to DP16KD
 2020-04-07 20:02:29 +01:00
Ross Schlaikjer
3aecb3b08c
No need to fetch context 2020-04-07 14:44:19 -04:00
Ross Schlaikjer
fc591421f9
Change assert to error 2020-04-07 14:42:27 -04:00
Ross Schlaikjer
e46b990251
Rearrange bool algebra 2020-04-07 14:31:17 -04:00
Ross Schlaikjer
3257bdc8a1
Actually just move all the logic to ArchInfo 2020-04-07 14:11:49 -04:00
Ross Schlaikjer
0bdf1e05f1
Extract regmode configuration to ArchInfo 2020-04-07 14:03:55 -04:00
Ross Schlaikjer
c007463168
Change timing database lookup based on REGMODE value 2020-04-07 13:48:21 -04:00
David Shah
e8933f8519
Merge pull request #419 from garytwong/handle-opendrain 
Handle OPENDRAIN attribute.
 2020-04-07 09:44:40 +01:00
Gary Wong
ec1eea9990 Fix assertion failure on invalid LOCATE input. 
Trying to parse this invalid LPF syntax:

    LOCATE COMP "a" SITE "A1"
    IOBUF PORT "a" IO_TYPE=LVCMOS33;

(note missing semicolon on first line) gives an assertion failure in
strip_quotes, because the fifth token is scanned as "A1"IOBUF (without
a trailing quote).

Avoid the problem by detecting extraneous input and issuing a more
specific error.
 2020-04-05 21:42:45 -06:00
Gary Wong
31e9fffadd Handle OPENDRAIN attribute. 2020-04-03 17:59:19 -06:00
David Shah
f9a76c56f7 ecp5: Allow use of IDDRXN and ODDRXN type primitives on the same pin 
Signed-off-by: David Shah <dave@ds0.me>
 2020-04-03 09:53:14 +01:00
Gary Wong
8cc6a2fae5 Remove comment about the USRMCLK primitive being untested. 
Tested and verified working: the trivial configuration:

    module USRMCLK( USRMCLKI, USRMCLKTS );
        input USRMCLKI, USRMCLKTS;
    endmodule

    module top( input clk );
        reg[ 24:0 ] count = 0;

        always @( posedge clk ) begin
            count <= count + 1'b1;
        end

        USRMCLK mspi( .USRMCLKI( count[ 20 ] ), .USRMCLKTS( count[ 24 ] ) );
    endmodule

produces the expected output (toggling at high frequency, toggling
tri-state at lower frequency) on an LFE5U-85 when fed with an appropriate
clock.  See https://bayimg.com/AAnNKAAGO for an example.  The top
(magenta) trace is the MCLK line.
 2020-04-02 21:35:35 -06:00
Martin
707289c8d6 Enum/int compatibility for EHXPLLL parameters 
- Lattice component EHXPLLL parameter compatibility, allowing to
  pass an int parameter for the enum (as expected by trellis tile)
  e.g. CLKOP_TRIM_DELAY : integer := 0;
 2020-04-02 14:25:00 +02:00
David Shah
3b49c20f43 ecp5: Proper support for '12k' device 
Signed-off-by: David Shah <dave@ds0.me>
 2020-03-13 11:22:11 +00:00
David Shah
bb73580209
Merge pull request #400 from YosysHQ/dave/tri-fixes 
Improve handling of unused inout port bits
 2020-03-10 13:50:59 +00:00
David Shah
751f4556fd ecp5: Fix differential inputs 
Signed-off-by: David Shah <dave@ds0.me>
 2020-03-08 11:32:34 +00:00
Sylvain Munaut
054be6fb67 build: Default the ECP5 and iCE40 roots to the install prefix 
If the user specifies a custom install prefix, chances are icestrom/trellis
are also in that prefix rather than the hardcoded /usr/local

Fixes #351

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2020-03-03 15:32:10 +01:00
David Shah
9aa22433ff Improve handling of unused inout port bits 
Signed-off-by: David Shah <dave@ds0.me>
 2020-02-25 14:26:47 +00:00
Sebastian Birke
2c938e0e8b Rename cmake path variable TRELLIS_ROOT to TRELLIS_INSTALL_PREFIX 2020-02-04 18:19:45 +01:00
Jared Boone
1b560ae44c CMake: Changing the definition of TRELLIS_ROOT to point to root of lib, share containing trellis libs and data 
two other commit message of squashed commits:
CMake: Search for user lib inside trellis instead of libtrellis

CMake: Fix missing path component for share contents
 2020-02-04 18:19:45 +01:00
David Shah
1ceffbe0bc
Merge pull request #391 from YosysHQ/router2-upstream 
Upstreaming router2
 2020-02-04 16:08:08 +00:00
David Shah
b4d029a55c
Merge pull request #385 from YosysHQ/router1-arc-fixes 
Fixes for partial reconfig demo
 2020-02-03 13:55:07 +00:00
David Shah
2248e07b66 router2: Improve flow and log output 
Signed-off-by: David Shah <dave@ds0.me>
 2020-02-03 13:46:05 +00:00
David Shah
7123209324 Allow selection of router algorithm 
Signed-off-by: David Shah <dave@ds0.me>
 2020-02-03 11:54:38 +00:00
David Shah
ad1cc12df1 router2: Make magic numbers configurable 
Signed-off-by: David Shah <dave@ds0.me>
 2020-02-03 11:38:31 +00:00
David Shah
5e1aac67db ecp5: Improve bounding box accuracy 
Signed-off-by: David Shah <dave@ds0.me>
 2020-02-03 11:38:31 +00:00
David Shah
d2c77fd9ae ecp5: router2 main rename 
Signed-off-by: David Shah <dave@ds0.me>
 2020-02-03 11:38:31 +00:00
David Shah
abdaa9c8a1 ecp5: Router2 test integration 
Signed-off-by: David Shah <dave@ds0.me>
 2020-02-03 11:38:30 +00:00
Erika
9185c85a54 python: Expose PlaceStrength enum and isValidBelForCell on ecp5 
Signed-off-by: Erika <rrika9@yahoo.com>
 2020-01-26 20:32:02 +00:00
David Shah
3b5e64e8c6 ecp5: Fix tieoff of unused DELAY signals 
Signed-off-by: David Shah <dave@ds0.me>
 2020-01-21 19:02:26 +00:00
David Shah
7c81d4e630 ecp5: Add SPICB0 IO support 
Signed-off-by: David Shah <dave@ds0.me>
 2020-01-20 20:30:14 +00:00
David Shah
9dc8e1e35d ecp5: Don't reroute existing globals 
Signed-off-by: David Shah <dave@ds0.me>
 2020-01-20 14:58:38 +00:00
Miodrag Milanovic
714769e1b8 Few more caught by clang 2020-01-18 15:58:09 +01:00
David Shah
54c1bc1538
Merge pull request #382 from YosysHQ/ecp5-psuedodiff 
ecp5: Add support for top pseudo diff outputs
 2020-01-16 09:38:00 +00:00
David Shah
f513d5fff4 ecp5: Add support for top pseudo diff outputs 
Signed-off-by: David Shah <dave@ds0.me>
 2020-01-15 11:43:12 +00:00
Larry Doolittle
eba6ea53f8 More adjustments to .bba file locations 
Follows PM discussion with Marcus Comstedt.
Extend changes in .bba file location (made in commit b6a7b60) to ice40 and MSVC cases,
  so all cases become compatible with read-only access to git tree.
Only known down-side is inefficiency when building out-of-tree for multiple architectures;
  people following that use case should consider using PREGENERATED_BBA_PATH.
It would be nice if there were less copy-paste in MSVC vs. non-MSVC content in family.cmake,
  but that would have to be addressed by someone more skilled in Cmake and MSVC.
 2020-01-14 12:28:40 -08:00
Larry Doolittle
b6a7b607fd Remove barrier to out-of-tree builds 
With this change, nextpnr can build successfully (and run correctly) using the git tree as a read-only reference.
No change in behavior observed for in-tree builds.
 2020-01-12 21:11:56 -08:00
Miodrag Milanovic
fb5480cde3 clangformat 2019-12-28 15:02:13 +01:00
Miodrag Milanovic
59f4755e8f made most of frequent numbers constants 2019-12-28 15:01:36 +01:00
Miodrag Milanovic
6cca93543b move constants to gfx.cc 2019-12-28 14:27:14 +01:00
Miodrag Milanovic
6ebe2fd034 remove synt example 2019-12-28 14:08:58 +01:00
Miodrag Milanovic
796d648995 Merge remote-tracking branch 'origin/master' into mmicko/ecp5_gui 2019-12-28 13:54:06 +01:00
Miodrag Milanovic
50f87a6024 add newline at eof 2019-12-28 13:51:02 +01:00
David Shah
0d43aff268 ecp5: Always promote IOLOGIC SCLK to global 
Fixes #374

Signed-off-by: David Shah <dave@ds0.me>
 2019-12-27 15:53:00 +00:00
David Shah
fe40094216 Preserve hierarchy through packing 
Signed-off-by: David Shah <dave@ds0.me>
 2019-12-27 10:44:30 +00:00
David Shah
b100087024 python: Add bindings for hierarchy structures 
Signed-off-by: David Shah <dave@ds0.me>
 2019-12-27 10:44:30 +00:00
David Shah
b6e2159cec Work around Qt MOC issue with IdString enums 
Signed-off-by: David Shah <dave@ds0.me>
 2019-12-27 10:32:23 +00:00
Miodrag Milanovic
a05954249a optimize and set order 2019-12-20 14:02:00 +01:00
Miodrag Milanovic
c26c5e7b8e clang format 2019-12-20 09:07:03 +01:00
Miodrag Milanovic
e4210e7fd3 Add all missing wires 2019-12-20 09:05:58 +01:00
Miodrag Milanovic
b271e59472 Add global wires 2019-12-15 17:20:48 +01:00
Miodrag Milanovic
d5174110fa more pips on connection box 2019-12-15 10:57:24 +01:00
Miodrag Milanovic
f2b8e347a9 cleanup and formating 2019-12-15 10:43:30 +01:00
Miodrag Milanovic
2872b500e3 make it more simetric 2019-12-15 10:33:12 +01:00
Miodrag Milanovic
bbc05f3113 optimize and add some missing pips 2019-12-15 10:07:55 +01:00
Miodrag Milanovic
3d42097e9d cleanup 2019-12-15 09:45:09 +01:00
Miodrag Milanovic
fa55a826b2 cleanup wire 2019-12-15 09:26:25 +01:00
Miodrag Milanovic
436260e47e move bel creation to gfx.cc 2019-12-15 09:21:58 +01:00
Miodrag Milanovic
fb27f1a031 fix formating 2019-12-14 16:40:27 +01:00
Miodrag Milanovic
cce27e72f0 lot more pips 2019-12-14 16:29:25 +01:00
Miodrag Milanovic
abf9bc3bb9 fixes and more pips 2019-12-14 16:10:41 +01:00
Miodrag Milanovic
d42ecc081e pips for alu, mult and memory 2019-12-14 13:00:09 +01:00
Miodrag Milanovic
7e7e20742d pips for ios 2019-12-14 12:30:04 +01:00
Miodrag Milanovic
601360b73a propagate w and h 2019-12-14 10:56:26 +01:00
Miodrag Milanovic
e118e418e5 pips for other type of connection box 2019-12-14 09:39:41 +01:00
Miodrag Milanovic
ebbfb6375d more new wires added 2019-12-14 09:18:24 +01:00
Miodrag Milanovic
19eb16045f ebr, mult and alu nice display 2019-12-14 08:21:02 +01:00
Miodrag Milanovic
6d005f38b5 add more 2019-12-13 19:44:49 +01:00
Miodrag Milanovic
2a5f0bbd28 new wires in db 2019-12-13 18:24:49 +01:00