gatecat
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bcc5158eab
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ci: Bump mistral version
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-06-05 13:01:49 +01:00 |
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gatecat
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0426ba4e87
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interchange: Add LIFCL-40 EVN tests
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-06-01 09:52:40 +01:00 |
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gatecat
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ba69b35501
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interchange: Bump versions
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-27 11:21:34 +01:00 |
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gatecat
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ff48ad83be
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interchange: Bump versions
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-21 10:00:35 +01:00 |
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Alessandro Comodi
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9dce00a4e7
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gh-actions: interchange: use commit sha as cache key
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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2021-05-20 19:57:03 +02:00 |
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gatecat
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6cef569155
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ci: Use GH only for Mistral and fpga-interchange
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 15:53:25 +01:00 |
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gatecat
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51949d95c3
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interchange: Bump version
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-07 10:28:59 +01:00 |
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gatecat
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5225550b5b
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interchange: Bump versions
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-04-30 11:42:43 +01:00 |
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gatecat
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0e6955a08d
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interchange: Bump versions
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-04-20 10:42:33 +01:00 |
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Alessandro Comodi
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ea9e12b6ae
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gh-actions: increase python-fpga-interchange tag version
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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2021-04-14 14:36:47 +02:00 |
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gatecat
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7acef00443
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interchange: Pin prjoxide commit
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-04-09 11:17:25 +01:00 |
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Keith Rothman
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c43ad2fab6
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Don't fail-fast for GH actions to allow for easier CI debugging.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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2021-04-06 10:42:05 -07:00 |
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Keith Rothman
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3a85088d66
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[interchange] Update interchange CI for new chipdb change.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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2021-04-01 15:59:48 -07:00 |
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gatecat
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9259763599
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ci: Build prjoxide only for LIFCL
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-03-30 16:55:03 +01:00 |
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gatecat
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ecfaae7f9e
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interchange: Add Nexus LUT test
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-03-30 16:31:51 +01:00 |
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gatecat
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b6b8959397
|
interchange: Add Nexus to CI
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-03-30 16:31:51 +01:00 |
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Alessandro Comodi
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d0bc033ab8
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gh-actions: better yosys caching based on version
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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2021-03-26 15:11:03 +01:00 |
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Alessandro Comodi
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b5ba3ee9ee
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interchange: add archcheck tests to all-device-test target
This increases parallelism and should make the FPGA interchange CI
faster
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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2021-03-26 15:11:03 +01:00 |
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Alessandro Comodi
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c4cb86efe9
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gh-actions: use ccache and build tools before running tests
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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2021-03-25 16:24:52 +01:00 |
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Alessandro Comodi
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9f28fa4e75
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gh-actions: interchange: multiple jobs, one for each device
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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2021-03-24 15:37:03 +01:00 |
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Alessandro Comodi
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2956a0ca03
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gh-actions: remove multi-process arch generation
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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2021-03-23 20:36:23 +01:00 |
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Alessandro Comodi
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c1e668f823
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fpga_interchange: address review comments
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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2021-03-16 22:02:06 +01:00 |
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Alessandro Comodi
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c68dfb09c4
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github-actions: add basic CI to test FPGA interchange
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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2021-03-16 15:39:02 +01:00 |
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