Eddie Hung
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57f8c216b5
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Fix compiler warning
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2018-12-29 00:21:18 -08:00 |
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Eddie Hung
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84485152cc
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Remove some more ice40 stuff
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2018-12-28 15:20:51 -08:00 |
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Eddie Hung
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0514fb9042
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Merge branch 'xc7' into xc7_gui
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2018-12-28 00:03:01 -08:00 |
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Eddie Hung
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ab35983000
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Use std::regex not boost::regex (even though Torc still depends on latter)
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2018-12-27 21:25:22 -08:00 |
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Eddie Hung
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ede0e93206
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Merge branch 'xc7' into xc7_gui
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2018-12-27 20:53:15 -08:00 |
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Eddie Hung
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a630758ca7
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Cleanup
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2018-12-26 18:14:23 -08:00 |
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Eddie Hung
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a8a00ff3fb
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Disable entering HROW from INT_[LR].CLK[01]
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2018-12-18 18:20:23 -08:00 |
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Eddie Hung
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b2b02c9c3b
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Prefer INT/CLB tile as "anchor" tilewire
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2018-12-18 16:42:18 -08:00 |
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Eddie Hung
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097062c5cb
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Remove pip_to_dst_wire lookup
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2018-12-08 22:49:39 -08:00 |
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Eddie Hung
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8c44888466
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Fix delay prediction
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2018-12-06 17:40:15 -08:00 |
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Eddie Hung
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904860b2b4
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Add comment
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2018-12-06 16:53:48 -08:00 |
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Eddie Hung
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66f22150b1
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Improve estimateDelay for global clocks
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2018-12-06 16:49:35 -08:00 |
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Eddie Hung
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5f75a8447f
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Merge in vx980t support
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2018-12-06 20:07:51 +00:00 |
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Eddie Hung
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c5165f7830
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Duplicate arcs.clear()
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2018-11-29 16:32:33 -08:00 |
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Eddie Hung
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6985e80c01
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Merge branch 'xc7' of gitlab.com:eddiehung/nextpnr into xc7
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2018-11-29 13:32:32 -08:00 |
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Miodrag Milanovic
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535fc953d4
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Use site x location to determine if it is one block or other
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2018-11-29 12:44:02 -08:00 |
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Miodrag Milanovic
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1f387d44fb
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Use site x location to determine if it is one block or other
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2018-11-29 21:12:56 +01:00 |
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Miodrag Milanovic
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b7a06a02c4
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Display slices
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2018-11-29 20:54:46 +01:00 |
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Eddie Hung
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4161856d49
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Add support for MMCME2_ADV
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2018-11-28 22:34:22 -08:00 |
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Miodrag Milanovic
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105c148848
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Made Pip and Wires trees work
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2018-11-28 19:49:28 +01:00 |
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Miodrag Milanovic
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bfa2157ae6
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compile fix for gui and proper size
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2018-11-28 17:59:58 +01:00 |
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Miodrag Milanovic
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f2fecc3c69
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make gui run
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2018-11-28 17:04:26 +01:00 |
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Eddie Hung
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13e7798b34
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Fix #endif placement
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2018-11-27 18:11:19 -08:00 |
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Eddie Hung
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212b03999b
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Gzip the torc_info data
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2018-11-27 18:08:03 -08:00 |
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Eddie Hung
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440802bf9d
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Add support for serialization of torc_info
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2018-11-27 17:55:31 -08:00 |
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Eddie Hung
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662733c171
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Remove methods
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2018-11-27 14:12:25 -08:00 |
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Eddie Hung
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a0b6d3b19b
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clangformat
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2018-11-27 12:28:48 -08:00 |
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Eddie Hung
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ae9ccfa5ad
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Refactor torc_info constructor
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2018-11-27 12:28:21 -08:00 |
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Eddie Hung
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fc015d28d3
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Fix pip indexing, do not allow fabric to connect to CLK (only global network can)
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2018-11-20 17:41:46 -08:00 |
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Eddie Hung
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fa3e390e5f
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Add TODO
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2018-11-20 14:43:21 -08:00 |
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Eddie Hung
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18cee5d279
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More changes for upstream
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2018-11-20 14:26:29 -08:00 |
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Eddie Hung
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72a16004e1
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Divide columns by 2 to get better X estimate for tiles
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2018-11-13 09:01:24 -08:00 |
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Eddie Hung
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75654a69f0
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Fix LUT input delays, speedup construct_wire_to_delay?
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2018-11-11 14:15:11 -08:00 |
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Eddie Hung
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99f5836b0e
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Add some cell delays
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2018-11-10 19:55:22 -08:00 |
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Eddie Hung
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f6bdd92640
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Implement Arch::getPipName() and remove debug/verbose before routing
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2018-11-10 16:11:38 -08:00 |
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Eddie Hung
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3576509684
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Add support for PS7 blocks
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2018-11-10 12:51:56 -08:00 |
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Eddie Hung
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5c56fab0ab
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[xc7] Add torc_info->site_index_to_bel lookup; also fix Arch::getBelByName()
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2018-11-03 15:56:06 -07:00 |
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Eddie Hung
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aa7f7d6a97
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clangformat
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2018-11-03 15:18:26 -07:00 |
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Eddie Hung
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4239e3668a
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[xc7] Make clg400 the default package (Zybo)
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2018-11-03 15:02:09 -07:00 |
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Eddie Hung
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c6bf8aff43
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[xc7] Fix timing analysis for constant drivers
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2018-11-03 14:24:29 -07:00 |
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Eddie Hung
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8f1c91151b
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Revert "[xc7] Fix getPortTimingClass for IOBs"
This reverts commit 5d9019994e.
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2018-11-03 13:30:58 -07:00 |
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Eddie Hung
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5d9019994e
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[xc7] Fix getPortTimingClass for IOBs
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2018-11-03 12:55:36 -07:00 |
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Eddie Hung
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324ff41f13
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Fix Torc path
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2018-11-03 12:10:21 -07:00 |
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Eddie Hung
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834f5f58c2
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Fix wire delays, disable BUFG I->O routethrough
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2018-09-05 22:24:46 -07:00 |
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Eddie Hung
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5214d1dbb5
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Segment anchors may not be beginning of wires
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2018-09-04 11:05:03 -07:00 |
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Eddie Hung
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d0916943c5
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Extend delays to cover BYP and FAN
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2018-09-04 10:41:32 -07:00 |
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Eddie Hung
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c7f0bdfc1b
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Move DelayInfo into loop
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2018-09-04 10:35:12 -07:00 |
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Eddie Hung
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db6e81d6c3
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Populate Arch::getWireDelay()
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2018-09-04 10:11:10 -07:00 |
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Eddie Hung
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d78f5a1d5b
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Build a pip_to_dst_wire lookup to speedup routing
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2018-09-03 22:59:34 -07:00 |
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Eddie Hung
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2eeb59d9f1
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Re-enable routing
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2018-09-03 22:24:59 -07:00 |
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