Commit Graph

2702 Commits

Author SHA1 Message Date
David Shah
9a621cf49c
Merge pull request #471 from smunaut/fix-pll-gbio-conflict
ice40: If IO is used by SB_GB_IO, can't use it for PLL
2020-07-12 14:54:47 +01:00
David Shah
19a4ddf2f0 ecp5: Add SYSCONFIG settings to bitstream
Signed-off-by: David Shah <dave@ds0.me>
2020-07-12 14:51:14 +01:00
David Shah
6016e54d6c ecp5: Add parsing of SYSCONFIG line in LPF
Signed-off-by: David Shah <dave@ds0.me>
2020-07-12 12:53:16 +01:00
Sylvain Munaut
33067130e5 ice40: If IO is used by SB_GB_IO, can't use it for PLL
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2020-07-09 13:04:19 +02:00
Miodrag Milanović
3cafb16aa6
Merge pull request #469 from YosysHQ/new_parts_fixes
Fixes for new part types
2020-07-08 17:24:15 +02:00
Miodrag Milanovic
2726f3af91 Fixes for new part types 2020-07-08 16:45:27 +02:00
David Shah
451d56051b
Merge pull request #468 from YosysHQ/support_hx4k
Support 4K parts directly
2020-07-08 14:15:49 +01:00
Miodrag Milanovic
1fae965cbb Use proper names in GUI 2020-07-08 14:16:00 +02:00
Miodrag Milanovic
32ddc94b4f Support rest of parts 2020-07-08 14:09:44 +02:00
Miodrag Milanovic
b45b375ff2 Missed adding option 2020-07-08 13:45:34 +02:00
Miodrag Milanovic
6991a53d68 Adding LP4K as well 2020-07-08 13:44:13 +02:00
Miodrag Milanovic
3be76a837d Support 4K parts directly 2020-07-08 13:22:59 +02:00
Miodrag Milanovic
bb3dad7ce7 Fix assert, check should be other way arround 2020-07-06 17:29:25 +02:00
David Shah
137241cfef
Merge pull request #463 from YosysHQ/fix-archcheck
Fix arch checks, and add these to CI
2020-07-02 13:32:30 +01:00
whitequark
4a2964c915
Merge pull request #465 from whitequark/fix-trellis-discovery
Improve Trellis discovery logic
2020-07-01 22:02:36 +00:00
whitequark
18bb70afca CMake: improve logic for discovering Trellis. 2020-07-01 21:11:03 +00:00
whitequark
f6e30f22f4 CMake: fix path checks in chipdb build scripts.
`if(NOT DEFINED)` is not appropriate since a variable that contains
`-NOTFOUND` still counts as `DEFINED`. This can cause issues if
configuration fails, writes `-NOTFOUND` to the cache, and is then
restarted.
2020-07-01 20:22:21 +00:00
David Shah
c0901fb972 ecp5: Fix derivation of OSCG timing constraint
Signed-off-by: David Shah <dave@ds0.me>
2020-06-29 22:11:00 +01:00
David Shah
72786e249a ci: Run --test architecture checks
Signed-off-by: David Shah <dave@ds0.me>
2020-06-29 21:32:26 +01:00
David Shah
43ad5614bd ci: Bump trellis and icestorm versions to latest
Signed-off-by: David Shah <dave@ds0.me>
2020-06-29 19:53:25 +01:00
David Shah
2c4ae853f2 ecp5: Fix getTileBelDimZ
Signed-off-by: David Shah <dave@ds0.me>
2020-06-29 19:52:31 +01:00
David Shah
c7fbdc7877 Avoid low-value and slow pip name check for ECP5
Signed-off-by: David Shah <dave@ds0.me>
2020-06-29 19:52:31 +01:00
David Shah
b24e0a609b ice40: Fix getBelsByTile
Signed-off-by: David Shah <dave@ds0.me>
2020-06-29 19:52:31 +01:00
David Shah
32e655d0af placer1: Unlock even if placement fails
Prevents a hang during routing when using --force

Fixes #462

Signed-off-by: David Shah <dave@ds0.me>
2020-06-29 16:39:31 +01:00
Miodrag Milanovic
929a1cc7e4 Make python bindings consistent 2020-06-27 13:24:30 +02:00
Miodrag Milanovic
7a95629aff Fix clangformat and execute it 2020-06-27 13:20:16 +02:00
Miodrag Milanovic
901ad4e917 Update git ignore locations 2020-06-27 13:18:06 +02:00
David Shah
9eb6e549c5 Update some URLs
Signed-off-by: David Shah <dave@ds0.me>
2020-06-26 11:43:27 +01:00
David Shah
4f4aa53120
Merge pull request #460 from whitequark/better-embed
Simplify and improve chipdb embedding/loading
2020-06-26 11:32:13 +01:00
whitequark
89e0cc8078 Simplify and improve chipdb embedding/loading. 2020-06-26 08:36:07 +00:00
David Shah
2873133479 Update COPYING
Signed-off-by: David Shah <dave@ds0.me>
2020-06-25 19:45:18 +01:00
David Shah
1df8ac805a HeAP: Add timeout to IO placement
Signed-off-by: David Shah <dave@ds0.me>
2020-06-25 19:42:53 +01:00
whitequark
19a3095ecb Fix typo 2020-06-25 17:26:57 +00:00
David Shah
dc209f6344
Merge pull request #459 from whitequark/better-chipdb
CMake: rewrite chipdb handling from ground up
2020-06-25 15:39:54 +01:00
whitequark
bf8d4c428e CMake: require at least version 3.5 (Ubuntu 16.04). 2020-06-25 14:03:37 +00:00
whitequark
1dc1164dce CMake: rewrite chipdb handling from ground up. 2020-06-25 14:03:37 +00:00
whitequark
23d19a254d CMake: only request a CXX compiler. 2020-06-24 13:22:49 +00:00
David Shah
7decb6526b
Merge pull request #458 from whitequark/patch-1
Remove dead links from README
2020-06-24 08:27:32 +01:00
whitequark
1f061b5a97
Remove dead links from README 2020-06-24 07:24:29 +00:00
David Shah
93dbb53371
Merge pull request #457 from whitequark/better-bba
CMake: promote bba to a true subproject
2020-06-24 07:09:08 +01:00
whitequark
4c7aedcf4e CMake: promote bba to a true subproject. 2020-06-23 10:47:18 +00:00
David Shah
c9e7d1448e clangformat
Signed-off-by: David Shah <dave@ds0.me>
2020-06-12 16:19:14 +01:00
David Shah
3c078f6090
Merge pull request #454 from YosysHQ/ecp5-global-place
ecp5: Fix placement of DCCs to guarantee routeability
2020-06-10 18:12:06 +01:00
David Shah
43fd9e6779 ecp5: Fix placement of DCCs to guarantee routeability
Signed-off-by: David Shah <dave@ds0.me>
2020-06-10 15:47:47 +01:00
David Shah
be50947fa6
Merge pull request #452 from smunaut/ice40_shiftreg_div_mode
ice40: Add support for the 2nd bit of SHIFTREG_DIV_MODE
2020-06-02 19:55:31 +01:00
Sylvain Munaut
9b71bba747 ice40: Add fallback behavior for Extra Cell config bits vectors
This helps make new nextpnr compatible with old chipdbs when a parameters
goes from single bit to multi bit.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2020-06-02 20:21:16 +02:00
Sylvain Munaut
5e2b6bcef9 ice40: Add support for the 2nd bit of SHIFTREG_DIV_MODE
This requires the matching chipdb update from icestorm project !

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2020-06-02 11:03:04 +02:00
David Shah
f44498a530
Merge pull request #447 from whitequark/wasi
Port nextpnr-{ice40,ecp5} to WASI
2020-05-24 14:23:35 +01:00
whitequark
e7bb04769d Port nextpnr-{ice40,ecp5} to WASI.
This involves very few changes, all typical to WASM ports:
  * WASM doesn't currently support threads or atomics so those are
    disabled.
  * WASM doesn't currently support exceptions so the exception
    machinery is stubbed out.
  * WASM doesn't (and can't) have mmap(), so an emulation library is
    used. That library currently doesn't support MAP_SHARED flags,
    so MAP_PRIVATE is used instead.

There is also an update to bring ECP5 bbasm CMake rules to parity
with iCE40 ones, since although it is possible to embed chipdb into
nextpnr on WASM, a 200 MB WASM file has very few practical uses.

The README is not updated and there is no included toolchain file
because at the moment it's not possible to build nextpnr with
upstream boost and wasi-libc. Boost requires a patch (merged, will
be available in boost 1.74.0), wasi-libc requires a few unmerged
patches.
2020-05-23 20:57:26 +00:00
David Shah
2d406f3e27
Merge pull request #440 from YosysHQ/lattice-fixes
Fixes for the Lattice SERDES eye demo designs
2020-05-18 09:38:41 +01:00