Commit Graph

143 Commits

Author SHA1 Message Date
Catherine
574f504787 Find all components of Python at the same time.
This is explicitly recommended by the FindPython module documentation
and is required to avoid failed builds on some systems. See:
https://cmake.org/cmake/help/latest/module/FindPython.html
2025-01-13 03:29:43 +00:00
Miodrag Milanović
5a807110de
Adding NanoXplore NG-Ultra support (#1397)
* ng-ultra: new architecture

* Implementation as in D2 deliverable

* Support for nxdesignsuite-24.0.0.0-20240429T102300

* Save memory by directly outputing json

* Add support for bidirectional IOs

* cleanup

* Create BFRs properly

* Add IOM insertion

* Cleanup

* Block certain pips depending of DDFR mode

* Add LUT bypass to improve routability

* Add bypass for CSC mode of GCK

* Fix IOM case

* Initial memory support

* Better RF/XRF handling

* fix

* RF placement and legalization

* Disconnect non available ports for NX_RAM

* cleanup

* Add RFB/RAM context support for latest release

* Remove ports that must not be used

* Proper port used only on RFB

* Add structure for clock sinks

* Use cell type where applicable

* Add clock sinks for other cell types

* Validation check fixes

* Commented too restrictive placement

* Added more crossbar wire type

* Hande IO termination input

* Fail early due to NX tools limitation for now

* Validations and fixes for RAM I/Os

* Fix for latest version of tools

* Use ctx->idf where applicable

* warn if RAM ports are not actually used

* Fix IOM packing

* Fix CY packing

* Change how constants are handled on CY

* Post placement optimization for CY

* Address comments for PR

* pack and export  GCK, WFG and PLL

* Cover more global routing cases

* Constraing to location if provided

* Place at LOC

* Pack and export DSP

* wip

* wip

* notes

* wip

* wip

* Validate DSPs

* DSP cascading

* Check mandatory parameters for DSP

* existing gck

* wip

* export all the rest for bitstream

* CDC packing

* add more sinks

* place FIFO

* map rest of FIFO ports

* enable pll by default

* cleanup

* Initial XLUT support

* Fix statistics

* Properly duplicate GCKs

* RRSTO and WRSTO are not used on XFIFO

* Fix for latest version of JSON format

* Implement GCK limitations

* cleanup

* cleanup

* Add more signals and use lowskew name

* cleanup code a bit

* Fix wfb

* detect cascaded GCKs

* Handle DFR

* Route dfr clock properly

* Cleanup

* Cleanup bitstream code

* Review issues addressed

* Move helper routines

* Expose private members for unit tests

* cleanup

* remove scale factor

* make all location helper arrays static

* Addressed review comments

* Support post-routing CSC and SCC

* Support NX_BFF

* Place CSS and SCC only on allowed locations

* Support latest Impulse

* ng_ultra: Expand bounding box further for left-edge IO

Signed-off-by: gatecat <gatecat@ds0.me>

* Export all IO parameters in bitstream

* Handle new CSV order or parameters and additional validation

* Add some more undocumented values for CSV

* Support for old and new CSV formats

* Initial DDFR support

* Display warning message once per file

* Address review issues

* Fix crash on memory access

* Make boundbox fit NG-Ultra internal design

* Update attributes after dff rewrite

* Implement basic NG-Ultra LUT-DFF unit tests

* Always use first seen xbar input

Signed-off-by: gatecat <gatecat@ds0.me>

* Simplified crossbar pip detection

* Change order to prevent issues with some unconnected constants

* Pack LUT and multiple DFF in stripe

* Place DFF chains

* Improve large DFF chains

* Rename to pack_dff_chains

* Better use XLUTs when possible

* pack output DFF together with XLUT

* option to disable XLUT optimiziations

* Make more optimizations optional

* fix to use pre-increment

* GCK for lowskew signals

* Bugfix for nets that are not part of lowskew network

* Fix bitstream export for PLL cell

* Remove separate route lowskew

* Allow WFG mode 2

* Merge inverter into GCK

* Add CSC per TILE when needed

* Improve reusage of existing cell for CSC

* Take preferred CSC

* Cleanup

* When in place CSC size not important

* Cleanup

* Reset and Load restriction

* make csc optimisation optional

* Proper count for IO resources

* Detect when there is no next cell for DSP chain

* Do not incorporate loops in XLUT

* Check if output exists

* Update copyright for delivery

* Make building NG-Ultra chip database optional, follow filename convention

* Ported drawing code to new API

* Update expandBoundingBox for NG-Ultra

* Copyright and license update

* Add README information

* cleanup and constids

* Using ctx->idf where applicable

* remove if_using_basecluster

* refactor extra data usage

* refactor to use create_cell_ptr only

* optimized getCSC

* optimize critical path a bit

* clangformat

* disable clangformat where applicable

---------

Signed-off-by: gatecat <gatecat@ds0.me>
Co-authored-by: Lofty <dan.ravensloft@gmail.com>
Co-authored-by: gatecat <gatecat@ds0.me>
2024-12-04 09:00:05 +01:00
myrtle
f36a6571c1
cmake: Use upstream BoostConfig.cmake instead of cmake's own (#1387)
Signed-off-by: gatecat <gatecat@ds0.me>
2024-10-22 10:35:54 +02:00
gatecat
fcdaf3f86c Remove fpga_interchange
Signed-off-by: gatecat <gatecat@ds0.me>
2024-09-30 13:10:30 +02:00
Lofty
d867019dcb upgrade to C++17 2024-01-04 17:32:56 +01:00
Lofty
1dbd81067a first round of review fixes 2024-01-03 13:42:18 +01:00
Lofty
d2297b1ba0 Add Rust FFI bindings 2024-01-03 13:42:18 +01:00
gatecat
0eb9a9ad02 placer_static: Initial prototype
Signed-off-by: gatecat <gatecat@ds0.me>
2023-10-02 14:56:40 +02:00
rowanG077
8a79a3522c build: Flatten include dirs when building comp db 2023-06-12 14:11:36 +02:00
gatecat
57b923a603 himbächel: Initial implementation
Signed-off-by: gatecat <gatecat@ds0.me>
2023-05-13 08:26:41 +02:00
gatecat
e4fcd3740d cmake: Make HeAP placer always-enabled
Signed-off-by: gatecat <gatecat@ds0.me>
2023-03-17 10:38:11 +01:00
Catherine
1809e18c7b CMake: detect platform support for threads 2023-02-23 10:05:44 +01:00
Catherine
088c822e28 CMake: check if warning flag is supported before use.
Clang 11 is failing on -Wno-format-truncation.
2023-02-23 09:44:29 +01:00
Dan Callaghan
4c7e805f18 use eigen as an IMPORTED target in CMake
Eigen considers the EIGEN3_INCLUDE_DIRS and EIGEN3_DEFINITIONS variables
to be deprecated and they will no longer be exported in the next release
after 3.4.0:
f2984cd077

Use the IMPORTED target instead, which seems to be the preferred way of
consuming third-party CMake libraries.
2023-01-24 13:11:50 +11:00
LAK132
ae8966040b Replace deprecated method of finding Python 3 2022-08-17 01:07:14 +09:30
Gabriel Somlo
9914f56137 Enable building against unbundled pybind11
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2022-07-04 14:54:59 -04:00
Lofty
ae67c98f11 Bump minimum CMake to 3.13 2022-05-21 18:26:36 +01:00
gatecat
92a58a2631 ci: Restructure and move entirely to GH actions from Cirrus
Signed-off-by: gatecat <gatecat@ds0.me>
2022-04-08 18:42:39 +01:00
gatecat
49f178ed94 Split up common into kernel,place,route
Signed-off-by: gatecat <gatecat@ds0.me>
2022-04-08 13:42:54 +01:00
Irides
03074cdbc2 cmake: properly include TBB libraries. 2022-04-05 10:12:44 -05:00
gatecat
41eecd7ce2 gui: Improve Fatal Error message
Signed-off-by: gatecat <gatecat@ds0.me>
2021-07-20 15:01:34 +01:00
gatecat
47f24a7024 mistral: Build libmistral as a cmake subdir
Signed-off-by: gatecat <gatecat@ds0.me>
2021-06-04 19:25:18 +01:00
gatecat
dcbb322447 Remove redundant code after hashlib move
Signed-off-by: gatecat <gatecat@ds0.me>
2021-06-02 15:05:20 +01:00
gatecat
879ac39e53 mistral: Renamed arch from cyclonev
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
gatecat
0533818cee cyclonev: Update in line with nextpnr changes
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 14:54:33 +01:00
Dan Ravensloft
6ffbb9ed87 cyclonev: basic platform 2021-05-15 14:52:19 +01:00
gatecat
4e346ecfba Hash table refactoring
Signed-off-by: gatecat <gatecat@ds0.me>
2021-04-14 10:30:19 +01:00
William D. Jones
2cb2985539 Add CMake option to enable IPO (enabled by default). 2021-04-07 06:25:29 -04:00
Keith Rothman
8d1eb0a195 Initial lookahead for FPGA interchange.
Currently the lookahead is disabled by default because of the time to
compute and RAM usage.  However it does appear to work reasonably well
in testing.  Further effort is required to lower RAM usage after initial
computation, and explore trade-off for cheaper time to compute.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-03-23 08:16:50 -07:00
gatecat
bac2a8ba02 cmake: Use IPO only if supported
Signed-off-by: gatecat <gatecat@ds0.me>
2021-03-19 09:40:27 +00:00
Keith Rothman
76c6e1248c Add option to link against "libprofiler".
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-03-18 14:02:07 -07:00
Keith Rothman
d5021e7ed5 Add IPO support for nextpnr, and have it enabled by default.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-03-18 14:01:40 -07:00
Keith Rothman
f4dc67879e Fixup GUI link dependencies on headers from libraries.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-03-18 14:00:19 -07:00
whitequark
bdf13ddcfb CMake: Don't include Abseil if it is not used. 2021-03-12 03:00:58 +00:00
whitequark
979e7b8709 Only depend on Abseil in threaded builds.
Abseil has a hard dependency on threads (not just in the build system
but in many places in the base libraries), so there is no way to use
it on WASI at the moment.
2021-03-10 06:18:42 +00:00
Keith Rothman
0afa0da19f Add absl::flat_hash_map.
This lowers the CPU cost of using the flat wire map in router2, and should
use less memory as well.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-03-01 09:55:54 -08:00
whitequark
a0af4d8768
cmake: Don't enable any -Werror flags without opt-in. 2021-02-26 00:33:05 +00:00
gatecat
23413a4d12 Fix compiler warnings introduced by -Wextra
Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-25 15:15:25 +00:00
gatecat
17183fff05 cmake: Enable -Wextra, and -Werror in some cases
-Werror is not enabled by default, except on CI and for a few specific common traps, to avoid the inevitable breakages when new compiler versions add new diagnostics.

Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-25 11:05:26 +00:00
Keith Rothman
664407089b Add FPGA interchange frontend and backend.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-15 09:54:58 -08:00
gatecat
8417470276 machxo2: Add clang-format exception to machxo2 binary blob C sources. 2021-02-12 10:36:59 +00:00
gatecat
510969ab97 Create machxo2 backend (renamed from generic).
Signed-off-by: William D. Jones <thor0505@comcast.net>
2021-02-12 10:36:59 +00:00
Keith Rothman
561b519716 Initial FPGA interchange (which is just a cut-down xilinx arch).
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:32 -08:00
Keith Rothman
a5472bc5c1 Default to Release, but allow other modes (e.g. Debug, RelWithDebInfo).
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-01-27 18:13:10 -08:00
Pepijn de Vos
3611f54902
Gowin target (#542)
* load wires

* add slice bels

* add IOB

* add aliases

* local aliases

* broken packing stuff

* working packer

* add constraints

* pnr runs1111

* add timing info

* constraints

* more constraint stuff

* add copyright

* remove generic reference

* remove parameters

* remove generic python api

* add newline to end of file

* some small refactoring

* warn on invalid constraints

* don't error on missing cell

* comment out debugging print

* typo

* avoid copy

* faster empty idstring

* remove intermediate variable

* no more deadnames

* fix cst warnings

* increase ripup and epsilon a bit

* take single device parameter

* add info to readme

* gui stubs

* Revert 4d03b681a8

* assign ff_used in assignArchInfo

* decrease beta for better routability

* try to fix CI
2020-12-30 14:59:55 +00:00
David Shah
0a54ffdd44 cmake: Disable building GUI by default
This should reduce the number of Qt5-related issues, which often prevent
even the basic command line flow from working.

Signed-off-by: David Shah <dave@ds0.me>
2020-12-08 10:01:23 +00:00
David Shah
2fe8bebc6c nexus: Update docs and CMake
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:59:04 +00:00
David Shah
9affda5626 nexus: Build and embed chipdb automatically
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
David Shah
54e0ef9cf7 Adding archdefs and bba PODs
Signed-off-by: David Shah <dave@ds0.me>
2020-11-30 08:45:27 +00:00
Rob Landley
9e597e0dda Building nextpnr on Devuan ascii 2.0 needs the "C" language enabled.
See https://lists.j-core.org/pipermail/j-core/2020-September/000940.html
2020-09-16 03:02:12 -05:00