gatecat
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b37d133c43
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Merge pull request #794 from YosysHQ/gatecat/router2p5
router2: Improved bidir routing and timing-driven ripup option
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2021-08-16 14:08:20 +01:00 |
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gatecat
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f207068ee2
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router2: Add experimental timing-driven ripup option
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-08-15 16:22:03 +01:00 |
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gatecat
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42522c492c
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router2: Alternative congestion cost schedule
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-08-15 16:22:03 +01:00 |
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gatecat
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2a856db72c
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router2: Adding some criticality heuristics
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-08-15 16:22:03 +01:00 |
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gatecat
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64f6b8bc67
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router2: Improved bidir routing and data structures
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-08-15 16:22:03 +01:00 |
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gatecat
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4d54b62e63
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Merge pull request #795 from YosysHQ/gatecat/mistral-include-fix
mistral: Include mistral generated files in include dirs
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2021-08-15 16:20:51 +01:00 |
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gatecat
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f7be385230
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mistral: Include mistral generated files in include dirs
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-08-15 15:13:31 +01:00 |
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gatecat
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e7db15d6a4
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mistral: Fix pip binding check
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-08-14 20:23:05 +01:00 |
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gatecat
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a66cd0200b
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clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-08-14 20:22:54 +01:00 |
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gatecat
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b0a4f1b86e
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Merge pull request #793 from gregdavill/ecp5_diff_od
ecp5: Enable OPENDRAIN on differential outputs
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2021-08-14 13:48:55 +01:00 |
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Greg Davill
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200c57f475
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ecp5: Enable OPENDRAIN on differential outputs
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2021-08-14 19:26:58 +09:30 |
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gatecat
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dd63764331
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Merge pull request #791 from yrabbit/wip
gowin: Add support for IOBUF and TBUF I/O modes. Change the constraint parser.
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2021-08-06 10:14:59 +01:00 |
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YRabbit
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3f959c7421
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gowin: Change the constraint parser to support multiple options per line. Add support for IOBUF and TBUF I/O modes.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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2021-08-06 17:43:20 +10:00 |
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gatecat
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0c1ee5fad1
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Merge pull request #789 from YosysHQ/gatecat/ecp5-pdp-outreg
ecp5: Copy REGMODE in PDP mode to both A and B ports
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2021-08-03 13:05:01 +01:00 |
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gatecat
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5482b9a0c6
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ecp5: Copy REGMODE in PDP mode to both A and B ports
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-08-02 20:58:45 +01:00 |
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gatecat
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ef1fbfc651
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Merge pull request #787 from YosysHQ/gatecat/report
Add JSON utilisation and timing report
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2021-07-30 14:29:55 +01:00 |
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gatecat
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8466985bc7
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Merge pull request #788 from YosysHQ/gatecat/router2-ice40
router2: Mark the destination as visited during backwards routing
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2021-07-30 11:10:21 +01:00 |
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gatecat
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b5a31d2e4e
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router2: Mark dest as visited during backwards routing
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-30 09:14:46 +01:00 |
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gatecat
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42f48b6dc0
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router2: Improve debugability of pip conflicts
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-29 13:04:59 +01:00 |
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gatecat
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d2007a386c
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common: Add JSON timing and utilisation report
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-29 12:53:23 +01:00 |
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gatecat
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4ac00af6fa
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basectx: Add a field to store timing results
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-29 12:52:13 +01:00 |
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gatecat
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0991003de9
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Merge pull request #785 from YosysHQ/gatecat/nexus2glb2fabric
nexus: Fix routeing of global clocks that also drive fabric
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2021-07-29 09:17:37 +01:00 |
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gatecat
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504199e70e
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nexus: Fix routeing of global clocks that also drive fabric
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-28 15:35:19 +01:00 |
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gatecat
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39a7381928
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Merge pull request #784 from YosysHQ/gatecat/nexus-ddr
nexus: Basic IDDRX1/ODDRX1 support
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2021-07-28 15:34:31 +01:00 |
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gatecat
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efd3252d08
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Merge pull request #783 from YosysHQ/gatecat/router2-crit-update
router2: Update route delays even when routes are congested
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2021-07-28 13:57:14 +01:00 |
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gatecat
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5686fdcf1c
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nexus: Basic packer and FASM support for I/ODDR
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-28 13:27:02 +01:00 |
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gatecat
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d0acb1b239
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nexus: Add IOLOGIC pins data
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-28 12:42:58 +01:00 |
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gatecat
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ce92cdf8e4
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router2: Update route delays even when routes are congested
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-28 12:15:36 +01:00 |
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gatecat
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14c676ab49
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timing: Allow overriding of route delays
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-28 11:20:28 +01:00 |
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gatecat
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eb6817c259
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Merge pull request #780 from YosysHQ/gatecat/fix-io-inv
interchange: Search backwards for IO macro placements, too
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2021-07-26 16:58:00 +01:00 |
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gatecat
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0b36616940
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Merge pull request #779 from YosysHQ/gatecat/ic-import-fix
interchange: Don't attempt to import instances as modules
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2021-07-26 16:57:49 +01:00 |
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gatecat
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b4602ae5bf
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interchange: Search backwards for IO macro placements, too
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-26 16:01:53 +01:00 |
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gatecat
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c74f0d3239
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interchange: Don't attempt to import instances as modules
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-26 15:36:20 +01:00 |
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gatecat
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6be26fbde7
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Merge pull request #775 from YosysHQ/gatecat/fix-io-checks
interchange: Check IO validity after all are placed
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2021-07-26 12:35:29 +01:00 |
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gatecat
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ef3be26a69
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Merge pull request #777 from YosysHQ/gatecat/gui-fixes
gui: Add about box and fix some small typos
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2021-07-25 13:07:47 +01:00 |
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gatecat
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bbb1ea26b6
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gui: Fix some typos
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-25 12:11:03 +01:00 |
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gatecat
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0e3b25468c
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gui: Implement about dialog
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-25 12:06:51 +01:00 |
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gatecat
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f61fa73b77
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interchange: Check IO validity after all are placed
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-23 17:09:39 +01:00 |
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gatecat
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5212e38512
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Merge pull request #757 from antmicro/lut-mapping-cache
interchange: Add caching of site LUT mapping solution
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2021-07-22 14:09:40 +01:00 |
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Maciej Kurc
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580a45485a
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Added an option to disable the LUT mapping cache
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
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2021-07-22 14:07:35 +02:00 |
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Maciej Kurc
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8fc16a57c9
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Added more code comments, formatted the code
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
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2021-07-22 12:59:10 +02:00 |
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gatecat
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8733cce5fa
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Merge pull request #772 from antmicro/xdc_parse
[Interchange] Add dummy function to parse creat_clock in XDC files
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2021-07-21 18:53:15 +01:00 |
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Maciej Dudek
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0e838c3cea
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Add dummy function to parse creat_clock in XDC files
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
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2021-07-21 18:43:11 +02:00 |
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gatecat
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391248e031
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Merge pull request #768 from YosysHQ/gatecat/fix-gui-error
gui: Improve Fatal Error message
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2021-07-21 11:42:54 +01:00 |
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gatecat
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86a91ccf1b
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clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-21 10:57:48 +01:00 |
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gatecat
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1a5bb7b8ab
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Merge pull request #770 from YosysHQ/gatecat/empty-idstringlist
Fix definition of an empty IdStringList
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2021-07-20 18:25:49 +01:00 |
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gatecat
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ef08c4a91d
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Merge pull request #771 from YosysHQ/gatecat/ice40-ip-no-busaddr74
ice40: Use default value when IP is missing BUS_ADDR74 parameter
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2021-07-20 18:25:39 +01:00 |
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gatecat
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8f722a0d35
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ice40: Use default value when IP is missing BUS_ADDR74 parameter
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-20 16:08:26 +01:00 |
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gatecat
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08bbe173ce
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Fix definition of an empty IdStringList
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-20 15:51:04 +01:00 |
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gatecat
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41eecd7ce2
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gui: Improve Fatal Error message
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-07-20 15:01:34 +01:00 |
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