David Shah
|
7c81d4e630
|
ecp5: Add SPICB0 IO support
Signed-off-by: David Shah <dave@ds0.me>
|
2020-01-20 20:30:14 +00:00 |
|
David Shah
|
f513d5fff4
|
ecp5: Add support for top pseudo diff outputs
Signed-off-by: David Shah <dave@ds0.me>
|
2020-01-15 11:43:12 +00:00 |
|
David Shah
|
349be76d26
|
ecp5: Add support for flipflops with preload
Signed-off-by: David Shah <dave@ds0.me>
|
2019-12-07 12:20:25 +00:00 |
|
David Shah
|
1c1c096861
|
ecp5: Fix 25k DDRDLLA bitstream gen
Signed-off-by: David Shah <dave@ds0.me>
|
2019-11-29 10:56:04 +00:00 |
|
David Shah
|
36c0ff2dbc
|
ecp5: Fix dynamic DELAYF control
Signed-off-by: David Shah <dave@ds0.me>
|
2019-11-18 20:58:08 +00:00 |
|
David Shah
|
5cf0ed5ede
|
ecp5: Allow setting drive strength for 3V3 IOs
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-26 22:21:18 +01:00 |
|
David Shah
|
c6401413a4
|
ecp5: Add support for IO registers
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-09 14:23:35 +01:00 |
|
David Shah
|
9b83e67460
|
ecp5: Preparations for new IO bels
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-09 10:55:10 +01:00 |
|
David Shah
|
d04e5954a6
|
ecp5: Adding support for 36-bit wide PDP RAMs
Signed-off-by: David Shah <dave@ds0.me>
|
2019-10-01 12:01:33 +01:00 |
|
David Shah
|
04be9a71f9
|
ecp5: Add support for clock gating with DCCA
Signed-off-by: David Shah <dave@ds0.me>
|
2019-08-31 10:45:12 +01:00 |
|
David Shah
|
9f9920f92b
|
ecp5: Add full part name to bitstream header
Signed-off-by: David Shah <dave@ds0.me>
|
2019-08-27 14:36:20 +01:00 |
|
David Shah
|
78f86ce67a
|
ecp5: Add GSR/SGSR support
Signed-off-by: David Shah <dave@ds0.me>
|
2019-08-27 13:14:41 +01:00 |
|
David Shah
|
661237eb64
|
ecp5: Add --out-of-context for building hard macros
Signed-off-by: David Shah <dave@ds0.me>
|
2019-08-07 14:22:47 +01:00 |
|
David Shah
|
ec48f8f464
|
ecp5: New Property interface
Signed-off-by: David Shah <dave@ds0.me>
|
2019-08-05 17:22:37 +01:00 |
|
David Shah
|
187db92b05
|
ecp5: Improve error message for bad chars in BRAM init strings
Signed-off-by: David Shah <dave@ds0.me>
|
2019-06-08 10:52:37 +01:00 |
|
David Shah
|
ae6c1170ef
|
ecp5: Derived constraint support for PLLs, clock dividers and oscillators
Signed-off-by: David Shah <davey1576@gmail.com>
|
2019-02-24 10:28:25 +01:00 |
|
David Shah
|
e50ab2106f
|
ecp5: Fixes for litedram
Signed-off-by: David Shah <davey1576@gmail.com>
|
2019-02-24 10:28:25 +01:00 |
|
David Shah
|
3b50b57f05
|
ecp5: Add DIFFRESISTOR support
Signed-off-by: David Shah <davey1576@gmail.com>
|
2019-02-24 10:28:25 +01:00 |
|
David Shah
|
f960139768
|
ecp5: Add support for referenced inputs
Signed-off-by: David Shah <davey1576@gmail.com>
|
2019-02-24 10:28:25 +01:00 |
|
David Shah
|
817ba5a4b9
|
ecp5: Add DELAYF/DELAYG support
Signed-off-by: David Shah <davey1576@gmail.com>
|
2019-02-24 10:28:25 +01:00 |
|
David Shah
|
fd52db813f
|
ecp5: Add TERMINATION support
Signed-off-by: David Shah <dave@ds0.me>
|
2019-02-24 10:28:25 +01:00 |
|
David Shah
|
491d64293d
|
ecp5: Add DDRDLLA support
Signed-off-by: David Shah <dave@ds0.me>
|
2019-02-24 10:28:25 +01:00 |
|
David Shah
|
68abcb365a
|
ecp5: Add ECLKSYNCB support
Signed-off-by: David Shah <dave@ds0.me>
|
2019-02-24 10:28:25 +01:00 |
|
David Shah
|
4402361246
|
ecp5: Helper functions and bitstream for DQS
Signed-off-by: David Shah <dave@ds0.me>
|
2019-02-24 10:28:25 +01:00 |
|
David Shah
|
52d1954d96
|
ecp5: Packing of ODDRX2F
Signed-off-by: David Shah <dave@ds0.me>
|
2019-02-24 10:28:25 +01:00 |
|
David Shah
|
4c7306185e
|
ecp5: Fix typo
Signed-off-by: David Shah <dave@ds0.me>
|
2019-02-14 12:31:33 +00:00 |
|
David Shah
|
882775acef
|
ecp5: Embed baseconfig
Signed-off-by: David Shah <dave@ds0.me>
|
2019-02-08 13:44:15 +00:00 |
|
David Shah
|
e929d221f3
|
ecp5: Adding DTR, OSCG, CLKDIVF, USRMCLK, JTAGG
Signed-off-by: David Shah <dave@ds0.me>
|
2019-02-08 12:34:22 +00:00 |
|
David Shah
|
747380537f
|
ecp5: Add PULLMODE support
Signed-off-by: David Shah <dave@ds0.me>
|
2019-01-07 14:27:58 +00:00 |
|
David Shah
|
c01bb88509
|
ecp5: Add IOLOGIC timing and bitstream; ODDR working
Signed-off-by: David Shah <dave@ds0.me>
|
2018-12-14 16:40:38 +00:00 |
|
David Shah
|
5a1190ade2
|
ecp5: Fix UR PLL tile coordinates
Signed-off-by: David Shah <dave@ds0.me>
|
2018-11-26 15:35:55 +00:00 |
|
David Shah
|
9c52afcf5f
|
clangformat
Signed-off-by: David Shah <dave@ds0.me>
|
2018-11-16 13:25:51 +00:00 |
|
David Shah
|
cfaa6c0e5d
|
Merge pull request #119 from cr1901/win-fix
nextpnr-ecp5 Windows Fixes
|
2018-11-16 10:00:13 +00:00 |
|
David Shah
|
f07bd98d59
|
ecp5: Better use of Boost
Signed-off-by: David Shah <dave@ds0.me>
|
2018-11-16 09:58:18 +00:00 |
|
David Shah
|
7e1df82462
|
ecp5: Regression fix & format
Signed-off-by: David Shah <dave@ds0.me>
|
2018-11-15 11:54:28 +00:00 |
|
David Shah
|
bc022173f0
|
ecp5: clangformat
Signed-off-by: David Shah <dave@ds0.me>
|
2018-11-15 11:30:27 +00:00 |
|
David Shah
|
e9fe444dc7
|
ecp5: Adding ancillary DCU bels
Signed-off-by: David Shah <dave@ds0.me>
|
2018-11-15 11:30:27 +00:00 |
|
David Shah
|
37cbabecfb
|
ecp5: remove debug and clangformat
Signed-off-by: David Shah <dave@ds0.me>
|
2018-11-15 11:30:27 +00:00 |
|
David Shah
|
c9d83ec08b
|
dcu: Fix bitstream param handling
Signed-off-by: David Shah <dave@ds0.me>
|
2018-11-15 11:30:27 +00:00 |
|
David Shah
|
c5a3571a06
|
ecp5: Working on DCU
Signed-off-by: David Shah <dave@ds0.me>
|
2018-11-15 11:30:27 +00:00 |
|
David Shah
|
983903887d
|
ecp5: DCU bitstream gen handling
Signed-off-by: David Shah <dave@ds0.me>
|
2018-11-15 11:30:27 +00:00 |
|
David Shah
|
cc9fb1497d
|
ecp5: Groundwork for DCU support
Signed-off-by: David Shah <dave@ds0.me>
|
2018-11-15 11:30:27 +00:00 |
|
David Shah
|
9e5aded5c6
|
ecp5: Fix 85k PLL_LR
Signed-off-by: David Shah <dave@ds0.me>
|
2018-11-11 15:12:27 +00:00 |
|
William D. Jones
|
553c611936
|
Rename io.{h,cc} to pio.{h,cc} to avoid naming conflict with Windows-provided io.h.
Signed-off-by: William D. Jones <thor0505@comcast.net>
|
2018-11-03 13:11:01 -04:00 |
|
David Shah
|
04f9b87101
|
ecp5: Allow setting IO SLEWRATE
Signed-off-by: David Shah <dave@ds0.me>
|
2018-11-01 20:41:51 +00:00 |
|
David Shah
|
e005cc6754
|
ecp5: Add PLL support
Signed-off-by: David Shah <dave@ds0.me>
|
2018-10-31 19:52:41 +00:00 |
|
David Shah
|
0ac48c6a08
|
ecp5: DSP fixes
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-10-22 16:18:29 +01:00 |
|
David Shah
|
535a6f625a
|
ecp5: Working on DSPs
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-10-22 11:19:59 +01:00 |
|
David Shah
|
1a06f4b2bd
|
ecp5: Adding DSP support
Signed-off-by: David Shah <davey1576@gmail.com>
|
2018-10-21 20:07:18 +01:00 |
|
David Shah
|
1cde208090
|
clangformat
Signed-off-by: David Shah <dave@ds0.me>
|
2018-10-16 14:37:58 +01:00 |
|